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refactor(cpus): reorder Cortex-X1 errata by ascending order

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Change-Id: I1e580dd330b545370b23d4b9704d899f6a679250
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
This commit is contained in:
Govindraj Raja 2023-06-15 11:07:31 -05:00
parent 62e84c8804
commit e76cfe50e7
1 changed files with 29 additions and 29 deletions
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58
lib/cpus/aarch64/cortex_x1.S
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2022, Google LLC. All rights reserved. * Copyright (c) 2022-2023, Google LLC. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -23,33 +23,6 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_X1_BHB_LOOP_COUNT, cortex_x1 wa_cve_2022_23960_bhb_vector_table CORTEX_X1_BHB_LOOP_COUNT, cortex_x1
#endif /* WORKAROUND_CVE_2022_23960 */ #endif /* WORKAROUND_CVE_2022_23960 */
/* --------------------------------------------------
* Errata Workaround for X1 Erratum 1821534.
* This applies to revision r0p0 and r1p0 of X1.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_x1_1821534_wa
/* Compare x0 against revision r1p0 */
mov x17, x30
bl check_errata_1821534
cbz x0, 1f
mrs x1, CORTEX_X1_ACTLR2_EL1
orr x1, x1, #BIT(2)
msr CORTEX_X1_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_x1_1821534_wa
func check_errata_1821534
/* Applies to r0p0 and r1p0 */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1821534
/* -------------------------------------------------- /* --------------------------------------------------
* Errata Workaround for X1 Erratum 1688305. * Errata Workaround for X1 Erratum 1688305.
* This applies to revision r0p0 and r1p0 of X1. * This applies to revision r0p0 and r1p0 of X1.
@ -78,6 +51,33 @@ func check_errata_1688305
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_1688305 endfunc check_errata_1688305
/* --------------------------------------------------
* Errata Workaround for X1 Erratum 1821534.
* This applies to revision r0p0 and r1p0 of X1.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_x1_1821534_wa
/* Compare x0 against revision r1p0 */
mov x17, x30
bl check_errata_1821534
cbz x0, 1f
mrs x1, CORTEX_X1_ACTLR2_EL1
orr x1, x1, #BIT(2)
msr CORTEX_X1_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_x1_1821534_wa
func check_errata_1821534
/* Applies to r0p0 and r1p0 */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1821534
/* -------------------------------------------------- /* --------------------------------------------------
* Errata Workaround for X1 Erratum 1827429. * Errata Workaround for X1 Erratum 1827429.
* This applies to revision r0p0 and r1p0 of X1. * This applies to revision r0p0 and r1p0 of X1.
@ -183,8 +183,8 @@ func cortex_x1_errata_report
* Report all errata. The revision-variant information is passed to * Report all errata. The revision-variant information is passed to
* checking functions of each errata. * checking functions of each errata.
*/ */
report_errata ERRATA_X1_1821534, cortex_x1, 1821534
report_errata ERRATA_X1_1688305, cortex_x1, 1688305 report_errata ERRATA_X1_1688305, cortex_x1, 1688305
report_errata ERRATA_X1_1821534, cortex_x1, 1821534
report_errata ERRATA_X1_1827429, cortex_x1, 1827429 report_errata ERRATA_X1_1827429, cortex_x1, 1827429
report_errata WORKAROUND_CVE_2022_23960, cortex_x1, cve_2022_23960 report_errata WORKAROUND_CVE_2022_23960, cortex_x1, cve_2022_23960