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feat(fvp): enable support for PSCI OS-initiated mode

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Change-Id: I4cd6d2bd7ec7f581bd525d5323a3b54e855e2e51
Signed-off-by: Wing Li <wingers@google.com>
This commit is contained in:
Wing Li 2023-01-26 18:33:43 -08:00
parent 9a70e69e05
commit e75cc247c7
5 changed files with 36 additions and 2 deletions
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6
include/plat/arm/common/plat_arm.h
View file

@ -125,6 +125,12 @@ void arm_setup_romlib(void);
#define ARM_LOCAL_PSTATE_WIDTH 4 #define ARM_LOCAL_PSTATE_WIDTH 4
#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1) #define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
#if PSCI_OS_INIT_MODE
#define ARM_LAST_AT_PLVL_MASK (ARM_LOCAL_PSTATE_MASK << \
(ARM_LOCAL_PSTATE_WIDTH * \
(PLAT_MAX_PWR_LVL + 1)))
#endif /* __PSCI_OS_INIT_MODE__ */
/* Macros to construct the composite power state */ /* Macros to construct the composite power state */
/* Make composite power state parameter till power level 0 */ /* Make composite power state parameter till power level 0 */

14
plat/arm/board/fvp/fvp_pm.c
View file

@ -227,7 +227,11 @@ static void fvp_pwr_domain_off(const psci_power_state_t *target_state)
* FVP handler called when a power domain is about to be suspended. The * FVP handler called when a power domain is about to be suspended. The
* target_state encodes the power state that each level should transition to. * target_state encodes the power state that each level should transition to.
******************************************************************************/ ******************************************************************************/
#if PSCI_OS_INIT_MODE
static int fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
#else
static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state) static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
#endif
{ {
unsigned long mpidr; unsigned long mpidr;
@ -237,7 +241,11 @@ static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
*/ */
if (target_state->pwr_domain_state[ARM_PWR_LVL0] == if (target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_RET) ARM_LOCAL_STATE_RET)
#if PSCI_OS_INIT_MODE
return PSCI_E_SUCCESS;
#else
return; return;
#endif
assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == assert(target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_OFF); ARM_LOCAL_STATE_OFF);
@ -269,6 +277,12 @@ static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
/* Program the power controller to power off this cpu. */ /* Program the power controller to power off this cpu. */
fvp_pwrc_write_ppoffr(read_mpidr_el1()); fvp_pwrc_write_ppoffr(read_mpidr_el1());
#if PSCI_OS_INIT_MODE
return PSCI_E_SUCCESS;
#else
return;
#endif
} }
/******************************************************************************* /*******************************************************************************

4
plat/arm/board/fvp/include/platform_def.h
View file

@ -30,6 +30,10 @@
#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
#if PSCI_OS_INIT_MODE
#define PLAT_MAX_CPU_SUSPEND_PWR_LVL ARM_PWR_LVL1
#endif
/* /*
* Other platform porting definitions are provided by included headers * Other platform porting definitions are provided by included headers
*/ */

2
plat/arm/board/fvp/platform.mk
View file

@ -472,3 +472,5 @@ ENABLE_FEAT_TCR2 := 2
ifeq (${SPMC_AT_EL3}, 1) ifeq (${SPMC_AT_EL3}, 1)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
endif endif
PSCI_OS_INIT_MODE := 1

12
plat/arm/common/arm_pm.c
View file

@ -79,7 +79,12 @@ int arm_validate_power_state(unsigned int power_state,
* search if the number of entries justify the additional complexity. * search if the number of entries justify the additional complexity.
*/ */
for (i = 0; !!arm_pm_idle_states[i]; i++) { for (i = 0; !!arm_pm_idle_states[i]; i++) {
#if PSCI_OS_INIT_MODE
if ((power_state & ~ARM_LAST_AT_PLVL_MASK) ==
arm_pm_idle_states[i])
#else
if (power_state == arm_pm_idle_states[i]) if (power_state == arm_pm_idle_states[i])
#endif /* __PSCI_OS_INIT_MODE__ */
break; break;
} }
@ -91,11 +96,14 @@ int arm_validate_power_state(unsigned int power_state,
state_id = psci_get_pstate_id(power_state); state_id = psci_get_pstate_id(power_state);
/* Parse the State ID and populate the state info parameter */ /* Parse the State ID and populate the state info parameter */
while (state_id) { for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) {
req_state->pwr_domain_state[i++] = state_id & req_state->pwr_domain_state[i] = state_id &
ARM_LOCAL_PSTATE_MASK; ARM_LOCAL_PSTATE_MASK;
state_id >>= ARM_LOCAL_PSTATE_WIDTH; state_id >>= ARM_LOCAL_PSTATE_WIDTH;
} }
#if PSCI_OS_INIT_MODE
req_state->last_at_pwrlvl = state_id & ARM_LOCAL_PSTATE_MASK;
#endif /* __PSCI_OS_INIT_MODE__ */
return PSCI_E_SUCCESS; return PSCI_E_SUCCESS;
} }