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fix(security): optimisations for CVE-2022-23960
Optimised the loop workaround for Spectre_BHB mitigation: 1. use of speculation barrier for cores implementing SB instruction. 2. use str/ldr instead of stp/ldp as the loop uses only X2 register. Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I8ac53ea1e42407ad8004c1d59c05f791011f195d
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2 changed files with 17 additions and 5 deletions
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@ -214,6 +214,19 @@
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ret
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ret
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.endm
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.endm
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/*
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* Macro for using speculation barrier instruction introduced by
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* FEAT_SB, if it's enabled.
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*/
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.macro speculation_barrier
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#if ENABLE_FEAT_SB
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sb
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#else
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dsb sy
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isb
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#endif
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.endm
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/*
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/*
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* Macro for mitigating against speculative execution beyond ERET. Uses the
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* Macro for mitigating against speculative execution beyond ERET. Uses the
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* speculation barrier instruction introduced by FEAT_SB, if it's enabled.
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* speculation barrier instruction introduced by FEAT_SB, if it's enabled.
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@ -9,11 +9,11 @@
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#if WORKAROUND_CVE_2022_23960
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#if WORKAROUND_CVE_2022_23960
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/*
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/*
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* This macro applies the mitigation for CVE-2022-23960.
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* This macro applies the mitigation for CVE-2022-23960.
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* The macro saves x2-x3 to the CPU context.
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* The macro saves x2 to the CPU context.
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* SP should point to the CPU context.
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* SP should point to the CPU context.
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*/
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*/
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.macro apply_cve_2022_23960_bhb_wa _bhb_loop_count
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.macro apply_cve_2022_23960_bhb_wa _bhb_loop_count
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stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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str x2, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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/* CVE-BHB-NUM loop count */
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/* CVE-BHB-NUM loop count */
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mov x2, \_bhb_loop_count
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mov x2, \_bhb_loop_count
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@ -24,8 +24,7 @@
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2:
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2:
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subs x2, x2, #1
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subs x2, x2, #1
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bne 1b
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bne 1b
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dsb sy
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speculation_barrier
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isb
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ldr x2, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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.endm
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.endm
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#endif /* WORKAROUND_CVE_2022_23960 */
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#endif /* WORKAROUND_CVE_2022_23960 */
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