Merge changes I1b092bc1,Ifc2461b4,I5176caa5 into integration

* changes:
  docs(rme): update RMM-EL3 Boot Manifest structure description
  feat(rme): read DRAM information from FVP DTB
  feat(rme): set DRAM information in Boot Manifest platform data
This commit is contained in:
Soby Mathew 2023-02-01 17:03:22 +01:00 committed by TrustedFirmware Code Review
commit e3df3ffa11
16 changed files with 274 additions and 74 deletions

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@ -53,7 +53,7 @@ are explained below:
consistency with the versioning schemes used in other parts of RMM.
This document specifies the 0.1 version of Boot Interface ABI and RMM-EL3
services specification and the 0.1 version of the Boot Manifest.
services specification and the 0.2 version of the Boot Manifest.
.. _rmm_el3_boot_interface:
@ -71,7 +71,7 @@ for configuration files.
The Boot Interface ABI defines a set of register conventions and
also a memory based manifest file to pass information from EL3 to RMM. The
boot manifest and the associated platform data in it can be dynamically created
Boot Manifest and the associated platform data in it can be dynamically created
by EL3 and there is no restriction on how the data can be obtained (e.g by DTB,
hoblist or other).
@ -99,7 +99,7 @@ During cold boot RMM expects the following register values:
x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of CPUs to be supported at runtime (see x2).
x1,Version for this Boot Interface as defined in :ref:`rmm_el3_ifc_versioning`.
x2,Maximum number of CPUs to be supported at runtime. RMM should ensure that it can support this maximum number.
x3,Base address for the shared buffer used for communication between EL3 firmware and RMM. This buffer must be of 4KB size (1 page). The boot manifest must be present at the base of this shared buffer during cold boot.
x3,Base address for the shared buffer used for communication between EL3 firmware and RMM. This buffer must be of 4KB size (1 page). The Boot Manifest must be present at the base of this shared buffer during cold boot.
During cold boot, EL3 firmware needs to allocate a 4KB page that will be
passed to RMM in x3. This memory will be used as shared buffer for communication
@ -162,8 +162,8 @@ as per the following table:
``E_RMM_BOOT_CPUS_OUT_OF_RAGE``,Number of CPUs reported by EL3 larger than maximum supported by RMM,-3
``E_RMM_BOOT_CPU_ID_OUT_OF_RAGE``,Current CPU Id is higher or equal than the number of CPUs supported by RMM,-4
``E_RMM_BOOT_INVALID_SHARED_BUFFER``,Invalid pointer to shared memory area,-5
``E_RMM_BOOT_MANIFEST_VERSION_NOT_SUPPORTED``,Version reported by the boot manifest not supported by RMM,-6
``E_RMM_BOOT_MANIFEST_DATA_ERROR``,Error parsing core boot manifest,-7
``E_RMM_BOOT_MANIFEST_VERSION_NOT_SUPPORTED``,Version reported by the Boot Manifest not supported by RMM,-6
``E_RMM_BOOT_MANIFEST_DATA_ERROR``,Error parsing core Boot Manifest,-7
For any error detected in RMM during cold or warm boot, RMM will return back to
EL3 using ``RMM_BOOT_COMPLETE`` SMC with an appropriate error code. It is
@ -177,25 +177,28 @@ warm boot by any PE should not enter RMM using the warm boot interface.
Boot Manifest
~~~~~~~~~~~~~
During cold boot, EL3 Firmware passes a memory boot manifest to RMM containing
During cold boot, EL3 Firmware passes a memory Boot Manifest to RMM containing
platform information.
This boot manifest is versioned independently of the boot interface, to help
evolve the boot manifest independent of the rest of Boot Manifest.
The current version for the boot manifest is ``v0.1`` and the rules explained
This Boot Manifest is versioned independently of the Boot Interface, to help
evolve the former independent of the latter.
The current version for the Boot Manifest is ``v0.2`` and the rules explained
in :ref:`rmm_el3_ifc_versioning` apply on this version as well.
The boot manifest is divided into two different components:
The Boot Manifest v0.2 has the following fields:
- Core Manifest: This is the generic parameters passed to RMM by EL3 common to all platforms.
- Platform data: This is defined by the platform owner and contains information specific to that platform.
- version : Version of the Manifest (v0.2)
- plat_data : Pointer to the platform specific data and not specified by this
document. These data are optional and can be NULL.
- plat_dram : Structure encoding the NS DRAM information on the platform. This
field is also optional and platform can choose to zero out this structure if
RMM does not need EL3 to send this information during the boot.
For the current version of the manifest, the core manifest contains a pointer
to the platform data. EL3 must ensure that the whole boot manifest,
including the platform data, if available, fits inside the RMM EL3 shared
buffer.
For the current version of the Boot Manifest, the core manifest contains a pointer
to the platform data. EL3 must ensure that the whole Boot Manifest, including
the platform data, if available, fits inside the RMM EL3 shared buffer.
For the type specification of the RMM Boot Manifest v0.1, refer to
For the data structure specification of Boot Manifest, refer to
:ref:`rmm_el3_manifest_struct`
.. _runtime_services_and_interface:
@ -525,19 +528,59 @@ _____
RMM-EL3 Boot Manifest structure
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The RMM-EL3 Boot Manifest structure contains platform boot information passed
from EL3 to RMM. The width of the Boot Manifest is 128 bits
.. image:: ../resources/diagrams/rmm_el3_manifest_struct.png
The RMM-EL3 Boot Manifest v0.2 structure contains platform boot information passed
from EL3 to RMM. The size of the Boot Manifest is 40 bytes.
The members of the RMM-EL3 Boot Manifest structure are shown in the following
table:
.. csv-table::
:header: "Name", "Range", "Type", Description
:widths: 2 1 1 4
+-----------+--------+----------------+----------------------------------------+
| Name | Offset | Type | Description |
+===========+========+================+========================================+
| version | 0 | uint32_t | Boot Manifest version |
+-----------+--------+----------------+----------------------------------------+
| padding | 4 | uint32_t | Reserved, set to 0 |
+-----------+--------+----------------+----------------------------------------+
| plat_data | 8 | uintptr_t | Pointer to Platform Data section |
+-----------+--------+----------------+----------------------------------------+
| plat_dram | 16 | ns_dram_info | NS DRAM Layout Info structure |
+-----------+--------+----------------+----------------------------------------+
.. _ns_dram_info_struct:
NS DRAM Layout Info structure
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
NS DRAM Layout Info structure contains information about platform Non-secure
DRAM layout. The members of this structure are shown in the table below:
+-----------+--------+----------------+----------------------------------------+
| Name | Offset | Type | Description |
+===========+========+================+========================================+
| num_banks | 0 | uint64_t | Number of NS DRAM banks |
+-----------+--------+----------------+----------------------------------------+
| banks | 8 | ns_dram_bank * | Pointer to 'ns_dram_bank'[] array |
+-----------+--------+----------------+----------------------------------------+
| checksum | 16 | uint64_t | Checksum |
+-----------+--------+----------------+----------------------------------------+
Checksum is calculated as two's complement sum of 'num_banks', 'banks' pointer
and DRAM banks data array pointed by it.
.. _ns_dram_bank_struct:
NS DRAM Bank structure
~~~~~~~~~~~~~~~~~~~~~~
NS DRAM Bank structure contains information about each Non-secure DRAM bank:
+-----------+--------+----------------+----------------------------------------+
| Name | Offset | Type | Description |
+===========+========+================+========================================+
| base | 0 | uintptr_t | Base address |
+-----------+--------+----------------+----------------------------------------+
| size | 8 | uint64_t | Size of bank in bytes |
+-----------+--------+----------------+----------------------------------------+
``Version Minor``,15:0,uint16_t,Version Minor part of the Boot Manifest Version.
``Version Major``,30:16,uint16_t,Version Major part of the Boot Manifest Version.
``RES0``,31,bit,Reserved. Set to 0.
``Platform Data``,127:64,Address,Pointer to the Platform Data section of the Boot Manifest.

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -235,6 +235,8 @@
#define ARM_DRAM2_SIZE PLAT_ARM_DRAM2_SIZE
#define ARM_DRAM2_END (ARM_DRAM2_BASE + \
ARM_DRAM2_SIZE - 1U)
/* Number of DRAM banks */
#define ARM_DRAM_NUM_BANKS 2UL
#define ARM_IRQ_SEC_PHY_TIMER 29

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@ -11,7 +11,7 @@
#include <lib/psci/psci.h>
#if defined(SPD_spmd)
#include <services/spm_core_manifest.h>
#include <services/spm_core_manifest.h>
#endif
#if ENABLE_RME
#include <services/rmm_core_manifest.h>
@ -37,6 +37,7 @@ struct bl_params;
struct mmap_region;
struct spm_mm_boot_info;
struct sp_res_desc;
struct rmm_manifest;
enum fw_enc_status_t;
/*******************************************************************************
@ -322,7 +323,7 @@ int plat_rmmd_get_cca_attest_token(uintptr_t buf, size_t *len,
int plat_rmmd_get_cca_realm_attest_key(uintptr_t buf, size_t *len,
unsigned int type);
size_t plat_rmmd_get_el3_rmm_shared_mem(uintptr_t *shared);
int plat_rmmd_load_manifest(rmm_manifest_t *manifest);
int plat_rmmd_load_manifest(struct rmm_manifest *manifest);
#endif
/*******************************************************************************

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, Arm Limited. All rights reserved.
* Copyright (c) 2022-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -14,7 +14,7 @@
#include <lib/cassert.h>
#define RMMD_MANIFEST_VERSION_MAJOR U(0)
#define RMMD_MANIFEST_VERSION_MINOR U(1)
#define RMMD_MANIFEST_VERSION_MINOR U(2)
/*
* Manifest version encoding:
@ -22,29 +22,57 @@
* - Bits [30:16] Major version
* - Bits [15:0] Minor version
*/
#define _RMMD_MANIFEST_VERSION(_major, _minor) \
#define SET_RMMD_MANIFEST_VERSION(_major, _minor) \
((((_major) & 0x7FFF) << 16) | ((_minor) & 0xFFFF))
#define RMMD_MANIFEST_VERSION _RMMD_MANIFEST_VERSION( \
RMMD_MANIFEST_VERSION_MAJOR, \
#define RMMD_MANIFEST_VERSION SET_RMMD_MANIFEST_VERSION( \
RMMD_MANIFEST_VERSION_MAJOR, \
RMMD_MANIFEST_VERSION_MINOR)
#define RMMD_GET_MANIFEST_VERSION_MAJOR(_version) \
#define RMMD_GET_MANIFEST_VERSION_MAJOR(_version) \
((_version >> 16) & 0x7FFF)
#define RMMD_GET_MANIFEST_VERSION_MINOR(_version) \
#define RMMD_GET_MANIFEST_VERSION_MINOR(_version) \
(_version & 0xFFFF)
/* Boot manifest core structure as per v0.1 */
typedef struct rmm_manifest {
uint32_t version; /* Manifest version */
uint32_t padding; /* RES0 */
uintptr_t plat_data; /* Manifest platform data */
} rmm_manifest_t;
/* NS DRAM bank structure */
struct ns_dram_bank {
uintptr_t base; /* Base address */
uint64_t size; /* Size of bank */
};
CASSERT(offsetof(rmm_manifest_t, version) == 0,
rmm_manifest_t_version_unaligned);
CASSERT(offsetof(rmm_manifest_t, plat_data) == 8,
rmm_manifest_t_plat_data_unaligned);
CASSERT(offsetof(struct ns_dram_bank, base) == 0UL,
rmm_manifest_base_unaligned);
CASSERT(offsetof(struct ns_dram_bank, size) == 8UL,
rmm_manifest_size_unaligned);
/* NS DRAM layout info structure */
struct ns_dram_info {
uint64_t num_banks; /* Number of NS DRAM banks */
struct ns_dram_bank *banks; /* Pointer to ns_dram_bank[] */
uint64_t checksum; /* Checksum of ns_dram_info data */
};
CASSERT(offsetof(struct ns_dram_info, num_banks) == 0UL,
rmm_manifest_num_banks_unaligned);
CASSERT(offsetof(struct ns_dram_info, banks) == 8UL,
rmm_manifest_dram_data_unaligned);
CASSERT(offsetof(struct ns_dram_info, checksum) == 16UL,
rmm_manifest_checksum_unaligned);
/* Boot manifest core structure as per v0.2 */
struct rmm_manifest {
uint32_t version; /* Manifest version */
uint32_t padding; /* RES0 */
uintptr_t plat_data; /* Manifest platform data */
struct ns_dram_info plat_dram; /* Platform NS DRAM data */
};
CASSERT(offsetof(struct rmm_manifest, version) == 0UL,
rmm_manifest_version_unaligned);
CASSERT(offsetof(struct rmm_manifest, plat_data) == 8UL,
rmm_manifest_plat_data_unaligned);
CASSERT(offsetof(struct rmm_manifest, plat_dram) == 16UL,
rmm_manifest_plat_dram_unaligned);
#endif /* RMM_CORE_MANIFEST_H */

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@ -9,9 +9,11 @@
#include <services/rmm_core_manifest.h>
struct rmm_manifest;
/*******************************************************************************
* Mandatory TRP functions (only if platform contains a TRP)
******************************************************************************/
void trp_early_platform_setup(rmm_manifest_t *manifest);
void trp_early_platform_setup(struct rmm_manifest *manifest);
#endif /* PLATFORM_TRP_H */

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -18,6 +18,15 @@ struct gicv3_config_t gicv3_config;
struct hw_topology_t soc_topology;
struct uart_serial_config_t uart_serial_config;
struct cpu_timer_t cpu_timer;
struct ns_dram_layout dram_layout;
/*
* Each NS DRAM bank entry is 'reg' node property which is
* a sequence of (address, length) pairs of 32-bit values.
*/
#define DRAM_ENTRY_SIZE (4UL * sizeof(uint32_t))
CASSERT(ARM_DRAM_NUM_BANKS == 2UL, ARM_DRAM_NUM_BANKS_mismatch);
#define ILLEGAL_ADDR ULL(~0)
@ -293,7 +302,58 @@ int fconf_populate_cpu_timer(uintptr_t config)
return 0;
}
int fconf_populate_dram_layout(uintptr_t config)
{
int node, len;
const uint32_t *reg;
/* Necessary to work with libfdt APIs */
const void *hw_config_dtb = (const void *)config;
/* Find 'memory' node */
node = fdt_node_offset_by_prop_value(hw_config_dtb, -1, "device_type",
"memory", sizeof("memory"));
if (node < 0) {
WARN("FCONF: Unable to locate 'memory' node\n");
return node;
}
reg = fdt_getprop(hw_config_dtb, node, "reg", &len);
if (reg == NULL) {
ERROR("FCONF failed to read 'reg' property\n");
return len;
}
switch (len) {
case DRAM_ENTRY_SIZE:
/* 1 DRAM bank */
dram_layout.num_banks = 1UL;
break;
case 2UL * DRAM_ENTRY_SIZE:
/* 2 DRAM banks */
dram_layout.num_banks = 2UL;
break;
default:
ERROR("FCONF: Invalid 'memory' node\n");
return -FDT_ERR_BADLAYOUT;
}
for (unsigned long i = 0UL; i < dram_layout.num_banks; i++) {
int err = fdt_get_reg_props_by_index(
hw_config_dtb, node, (int)i,
&dram_layout.dram_bank[i].base,
(size_t *)&dram_layout.dram_bank[i].size);
if (err < 0) {
ERROR("FCONF: Failed to read 'reg' property #%lu of 'memory' node\n", i);
return err;
}
}
return 0;
}
FCONF_REGISTER_POPULATOR(HW_CONFIG, gicv3_config, fconf_populate_gicv3_config);
FCONF_REGISTER_POPULATOR(HW_CONFIG, topology, fconf_populate_topology);
FCONF_REGISTER_POPULATOR(HW_CONFIG, uart_config, fconf_populate_uart_config);
FCONF_REGISTER_POPULATOR(HW_CONFIG, cpu_timer, fconf_populate_cpu_timer);
FCONF_REGISTER_POPULATOR(HW_CONFIG, dram_layout, fconf_populate_dram_layout);

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,19 +12,19 @@
#include <drivers/arm/gicv2.h>
#include <drivers/arm/sp804_delay_timer.h>
#include <drivers/generic_delay_timer.h>
#include <fconf_hw_config_getter.h>
#include <lib/mmio.h>
#include <lib/smccc.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
#include <platform_def.h>
#include <services/arm_arch_svc.h>
#if ENABLE_RME
#include <services/rmm_core_manifest.h>
#endif
#if SPM_MM
#include <services/spm_mm_partition.h>
#endif
#include <plat/arm/common/arm_config.h>
#include <plat/arm/common/arm_pas_def.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
@ -531,15 +531,73 @@ size_t plat_rmmd_get_el3_rmm_shared_mem(uintptr_t *shared)
return (size_t)RMM_SHARED_SIZE;
}
int plat_rmmd_load_manifest(rmm_manifest_t *manifest)
int plat_rmmd_load_manifest(struct rmm_manifest *manifest)
{
uint64_t checksum, num_banks;
struct ns_dram_bank *bank_ptr;
assert(manifest != NULL);
/* Get number of DRAM banks */
num_banks = FCONF_GET_PROPERTY(hw_config, dram_layout, num_banks);
assert(num_banks <= ARM_DRAM_NUM_BANKS);
manifest->version = RMMD_MANIFEST_VERSION;
manifest->padding = 0U; /* RES0 */
manifest->plat_data = (uintptr_t)NULL;
manifest->plat_dram.num_banks = num_banks;
/*
* Array ns_dram_banks[] follows ns_dram_info structure:
*
* +-----------------------------------+
* | offset | field | comment |
* +----------+-----------+------------+
* | 0 | version | 0x00000002 |
* +----------+-----------+------------+
* | 4 | padding | 0x00000000 |
* +----------+-----------+------------+
* | 8 | plat_data | NULL |
* +----------+-----------+------------+
* | 16 | num_banks | |
* +----------+-----------+ |
* | 24 | banks | plat_dram |
* +----------+-----------+ |
* | 32 | checksum | |
* +----------+-----------+------------+
* | 40 | base 0 | |
* +----------+-----------+ bank[0] |
* | 48 | size 0 | |
* +----------+-----------+------------+
* | 56 | base 1 | |
* +----------+-----------+ bank[1] |
* | 64 | size 1 | |
* +----------+-----------+------------+
*/
bank_ptr = (struct ns_dram_bank *)
((uintptr_t)&manifest->plat_dram.checksum +
sizeof(manifest->plat_dram.checksum));
manifest->plat_dram.banks = bank_ptr;
/* Calculate checksum of plat_dram structure */
checksum = num_banks + (uint64_t)bank_ptr;
/* Store FVP DRAM banks data in Boot Manifest */
for (unsigned long i = 0UL; i < num_banks; i++) {
uintptr_t base = FCONF_GET_PROPERTY(hw_config, dram_layout, dram_bank[i].base);
uint64_t size = FCONF_GET_PROPERTY(hw_config, dram_layout, dram_bank[i].size);
bank_ptr[i].base = base;
bank_ptr[i].size = size;
/* Update checksum */
checksum += base + size;
}
/* Checksum must be 0 */
manifest->plat_dram.checksum = ~checksum + 1UL;
return 0;
}
#endif
#endif /* ENABLE_RME */

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,12 +8,16 @@
#define FCONF_HW_CONFIG_GETTER_H
#include <lib/fconf/fconf.h>
#include <services/rmm_core_manifest.h>
#include <plat/arm/common/arm_def.h>
/* Hardware Config related getter */
#define hw_config__gicv3_config_getter(prop) gicv3_config.prop
#define hw_config__topology_getter(prop) soc_topology.prop
#define hw_config__uart_serial_config_getter(prop) uart_serial_config.prop
#define hw_config__cpu_timer_getter(prop) cpu_timer.prop
#define hw_config__dram_layout_getter(prop) dram_layout.prop
struct gicv3_config_t {
uint64_t gicd_base;
@ -36,13 +40,21 @@ struct cpu_timer_t {
uint32_t clock_freq;
};
struct ns_dram_layout {
uint64_t num_banks;
struct ns_dram_bank dram_bank[ARM_DRAM_NUM_BANKS];
};
int fconf_populate_gicv3_config(uintptr_t config);
int fconf_populate_topology(uintptr_t config);
int fconf_populate_uart_config(uintptr_t config);
int fconf_populate_cpu_timer(uintptr_t config);
int fconf_populate_dram_layout(uintptr_t config);
extern struct gicv3_config_t gicv3_config;
extern struct hw_topology_t soc_topology;
extern struct uart_serial_config_t uart_serial_config;
extern struct cpu_timer_t cpu_timer;
extern struct ns_dram_layout dram_layout;
#endif /* FCONF_HW_CONFIG_GETTER_H */

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@ -1,5 +1,5 @@
#
# Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -21,6 +21,7 @@ fdt fdt_getprop_namelen
fdt fdt_setprop_inplace
fdt fdt_check_header
fdt fdt_node_offset_by_compatible
fdt fdt_node_offset_by_prop_value
fdt fdt_setprop_inplace_namelen_partial
fdt fdt_first_subnode
fdt fdt_next_subnode

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -18,16 +18,14 @@
#include <drivers/partition/partition.h>
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#if ENABLE_RME
#include <lib/gpt_rme/gpt_rme.h>
#endif /* ENABLE_RME */
#ifdef SPD_opteed
#include <lib/optee_utils.h>
#endif
#include <lib/utils.h>
#if ENABLE_RME
#include <plat/arm/common/arm_pas_def.h>
#endif /* ENABLE_RME */
#endif
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
@ -131,7 +129,6 @@ void bl2_platform_setup(void)
}
#if ENABLE_RME
static void arm_bl2_plat_gpt_setup(void)
{
/*
@ -171,7 +168,6 @@ static void arm_bl2_plat_gpt_setup(void)
panic();
}
}
#endif /* ENABLE_RME */
/*******************************************************************************

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@ -13,9 +13,7 @@
#include <drivers/console.h>
#include <lib/debugfs.h>
#include <lib/extensions/ras.h>
#if ENABLE_RME
#include <lib/gpt_rme/gpt_rme.h>
#endif
#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
#include <plat/arm/common/plat_arm.h>

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@ -26,7 +26,7 @@ extern uint32_t trp_boot_manifest_version;
******************************************************************************/
static console_t arm_trp_runtime_console;
static int arm_trp_process_manifest(rmm_manifest_t *manifest)
static int arm_trp_process_manifest(struct rmm_manifest *manifest)
{
/* padding field on the manifest must be RES0 */
assert(manifest->padding == 0U);
@ -38,12 +38,12 @@ static int arm_trp_process_manifest(rmm_manifest_t *manifest)
}
trp_boot_manifest_version = manifest->version;
flush_dcache_range((uintptr_t)manifest, sizeof(rmm_manifest_t));
flush_dcache_range((uintptr_t)manifest, sizeof(struct rmm_manifest));
return 0;
}
void arm_trp_early_platform_setup(rmm_manifest_t *manifest)
void arm_trp_early_platform_setup(struct rmm_manifest *manifest)
{
int rc;
@ -66,10 +66,9 @@ void arm_trp_early_platform_setup(rmm_manifest_t *manifest)
console_set_scope(&arm_trp_runtime_console,
CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
}
void trp_early_platform_setup(rmm_manifest_t *manifest)
void trp_early_platform_setup(struct rmm_manifest *manifest)
{
arm_trp_early_platform_setup(manifest);
}

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@ -171,7 +171,7 @@ int rmmd_setup(void)
uint32_t ep_attr;
unsigned int linear_id = plat_my_core_pos();
rmmd_rmm_context_t *rmm_ctx = &rmm_context[linear_id];
rmm_manifest_t *manifest;
struct rmm_manifest *manifest;
int rc;
/* Make sure RME is supported. */
@ -206,7 +206,7 @@ int rmmd_setup(void)
((void *)shared_buf_base != NULL));
/* Load the boot manifest at the beginning of the shared area */
manifest = (rmm_manifest_t *)shared_buf_base;
manifest = (struct rmm_manifest *)shared_buf_base;
rc = plat_rmmd_load_manifest(manifest);
if (rc != 0) {
ERROR("Error loading RMM Boot Manifest (%i)\n", rc);

View file

@ -62,7 +62,7 @@ void trp_setup(uint64_t x0,
sizeof(trp_shared_region_start));
/* Perform early platform-specific setup */
trp_early_platform_setup((rmm_manifest_t *)trp_shared_region_start);
trp_early_platform_setup((struct rmm_manifest *)trp_shared_region_start);
}
int trp_validate_warmboot_args(uint64_t x0, uint64_t x1,