fix(imx8ulp): add sw workaround for csi/hotplug test hang

When doing CSI stress test after cpu hotplug, sometimes, system
will hang in CSI test. After some debug, we find that if slow
down the APD NIC frequency before power on the offline CPU,
the issue is gone. For now, just add such SW workaround.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I39a49efc382fbebf46e1ff15c93d506bd5f6bec1
This commit is contained in:
Jacky Bai 2022-08-30 15:51:06 +08:00
parent 416c4433f0
commit e1d5c3c8f4
2 changed files with 9 additions and 0 deletions

View file

@ -91,12 +91,17 @@ static int imx_pwr_set_cpu_entry(unsigned int cpu, unsigned int entry)
return 0;
}
static volatile uint32_t cgc1_nicclk;
int imx_pwr_domain_on(u_register_t mpidr)
{
unsigned int cpu = MPIDR_AFFLVL0_VAL(mpidr);
imx_pwr_set_cpu_entry(cpu, secure_entrypoint);
/* slow down the APD NIC bus clock */
cgc1_nicclk = mmio_read_32(IMX_CGC1_BASE + 0x34);
mmio_clrbits_32(IMX_CGC1_BASE + 0x34, GENMASK_32(29, 28));
mmio_write_32(IMX_CMC1_BASE + 0x18, 0x3f);
mmio_write_32(IMX_CMC1_BASE + 0x50 + 0x4 * cpu, 0);
@ -111,6 +116,9 @@ void imx_pwr_domain_on_finish(const psci_power_state_t *target_state)
imx_pwr_set_cpu_entry(0, IMX_ROM_ENTRY);
plat_gic_pcpu_init();
plat_gic_cpuif_enable();
/* set APD NIC back to orignally setting */
mmio_write_32(IMX_CGC1_BASE + 0x34, cgc1_nicclk);
}
int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint)

View file

@ -58,6 +58,7 @@ SEPARATE_NOBITS_REGION := 1
SEPARATE_RWDATA_REGION := 1
PROGRAMMABLE_RESET_ADDRESS := 1
COLD_BOOT_SINGLE_CPU := 1
WARMBOOT_ENABLE_DCACHE_EARLY := 1
BL32_BASE ?= 0xa6000000
BL32_SIZE ?= 0x2000000
$(eval $(call add_define,BL32_BASE))