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lib/cpus: Report AT speculative erratum workaround
Reported the status (applies, missing) of AT speculative workaround which is applicable for below CPUs. +---------+--------------+ | Errata | CPU | +=========+==============+ | 1165522 | Cortex-A76 | +---------+--------------+ | 1319367 | Cortex-A72 | +---------+--------------+ | 1319537 | Cortex-A57 | +---------+--------------+ | 1530923 | Cortex-A55 | +---------+--------------+ | 1530924 | Cortex-A53 | +---------+--------------+ Also, changes are done to enable common macro 'ERRATA_SPECULATIVE_AT' if AT speculative errata workaround is enabled for any of the above CPUs using 'ERRATA_*' CPU specific build macro. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I3e6a5316a2564071f3920c3ce9ae9a29adbe435b
This commit is contained in:
Manish V Badarkhe
parent
86ba585300
commit
e1c4933372
6 changed files with 129 additions and 4 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -239,6 +239,20 @@ exit_check_errata_843419:
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ret
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endfunc check_errata_843419
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/* --------------------------------------------------
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* Errata workaround for Cortex A53 Errata #1530924.
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* This applies to all revisions of Cortex A53.
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* --------------------------------------------------
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*/
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func check_errata_1530924
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#if ERRATA_A53_1530924
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_1530924
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A53.
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* Shall clobber: x0-x19
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@ -359,6 +373,7 @@ func cortex_a53_errata_report
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report_errata ERRATA_A53_836870, cortex_a53, disable_non_temporal_hint
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report_errata ERRATA_A53_843419, cortex_a53, 843419
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report_errata ERRATA_A53_855873, cortex_a53, 855873
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report_errata ERRATA_A53_1530924, cortex_a53, 1530924
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ldp x8, x30, [sp], #16
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ret
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -222,6 +222,20 @@ func check_errata_1221012
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b cpu_rev_var_ls
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endfunc check_errata_1221012
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/* --------------------------------------------------
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* Errata workaround for Cortex A55 Errata #1530923.
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* This applies to all revisions of Cortex A55.
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* --------------------------------------------------
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*/
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func check_errata_1530923
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#if ERRATA_A55_1530923
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_1530923
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func cortex_a55_reset_func
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mov x19, x30
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@ -306,6 +320,7 @@ func cortex_a55_errata_report
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report_errata ERRATA_A55_846532, cortex_a55, 846532
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report_errata ERRATA_A55_903758, cortex_a55, 903758
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report_errata ERRATA_A55_1221012, cortex_a55, 1221012
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report_errata ERRATA_A55_1530923, cortex_a55, 1530923
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ldp x8, x30, [sp], #16
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ret
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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@ -396,6 +396,20 @@ func check_errata_cve_2018_3639
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ret
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endfunc check_errata_cve_2018_3639
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/* --------------------------------------------------
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* Errata workaround for Cortex A57 Errata #1319537.
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* This applies to all revisions of Cortex A57.
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* --------------------------------------------------
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*/
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func check_errata_1319537
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#if ERRATA_A57_1319537
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_1319537
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A57.
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* Shall clobber: x0-x19
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@ -613,6 +627,7 @@ func cortex_a57_errata_report
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report_errata ERRATA_A57_829520, cortex_a57, 829520
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report_errata ERRATA_A57_833471, cortex_a57, 833471
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report_errata ERRATA_A57_859972, cortex_a57, 859972
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report_errata ERRATA_A57_1319537, cortex_a57, 1319537
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report_errata WORKAROUND_CVE_2017_5715, cortex_a57, cve_2017_5715
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report_errata WORKAROUND_CVE_2018_3639, cortex_a57, cve_2018_3639
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -119,6 +119,20 @@ func check_errata_cve_2018_3639
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ret
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endfunc check_errata_cve_2018_3639
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/* --------------------------------------------------
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* Errata workaround for Cortex A72 Errata #1319367.
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* This applies to all revisions of Cortex A72.
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* --------------------------------------------------
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*/
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func check_errata_1319367
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#if ERRATA_A72_1319367
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mov x0, #ERRATA_APPLIES
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#else
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mov x0, #ERRATA_MISSING
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#endif
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ret
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endfunc check_errata_1319367
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A72.
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* -------------------------------------------------
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@ -282,6 +296,7 @@ func cortex_a72_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_A72_859971, cortex_a72, 859971
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report_errata ERRATA_A72_1319367, cortex_a72, 1319367
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report_errata WORKAROUND_CVE_2017_5715, cortex_a72, cve_2017_5715
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report_errata WORKAROUND_CVE_2018_3639, cortex_a72, cve_2018_3639
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@ -465,6 +465,23 @@ func cortex_a76_disable_wa_cve_2018_3639
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ret
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endfunc cortex_a76_disable_wa_cve_2018_3639
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/* --------------------------------------------------------------
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* Errata Workaround for Cortex A76 Errata #1165522.
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* This applies only to revisions <= r3p0 of Cortex A76.
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* Due to the nature of the errata it is applied unconditionally
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* when built in, report it as applicable in this case
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* --------------------------------------------------------------
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*/
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func check_errata_1165522
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#if ERRATA_A76_1165522
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mov x0, #ERRATA_APPLIES
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ret
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#else
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mov x1, #0x30
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b cpu_rev_var_ls
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#endif
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endfunc check_errata_1165522
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A76.
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* Shall clobber: x0-x19
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@ -597,6 +614,7 @@ func cortex_a76_errata_report
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report_errata ERRATA_A76_1286807, cortex_a76, 1286807
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report_errata ERRATA_A76_1791580, cortex_a76, 1791580
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report_errata ERRATA_A76_1800710, cortex_a76, 1800710
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report_errata ERRATA_A76_1165522, cortex_a76, 1165522
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report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639
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report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953
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report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184
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@ -130,6 +130,10 @@ ERRATA_A53_843419 ?=0
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# of by the rich OS.
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ERRATA_A53_855873 ?=0
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# Flag to apply erratum 1530924 workaround during reset. This erratum applies
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# to all revisions of Cortex A53 cpu.
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ERRATA_A53_1530924 ?=0
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# Flag to apply erratum 768277 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A55 cpu.
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ERRATA_A55_768277 ?=0
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@ -154,6 +158,10 @@ ERRATA_A55_903758 ?=0
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# only to revision <= r1p0 of the Cortex A55 cpu.
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ERRATA_A55_1221012 ?=0
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# Flag to apply erratum 1530923 workaround during reset. This erratum applies
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# to all revisions of Cortex A55 cpu.
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ERRATA_A55_1530923 ?=0
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# Flag to apply erratum 806969 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A57 cpu.
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ERRATA_A57_806969 ?=0
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@ -198,10 +206,18 @@ ERRATA_A57_833471 ?=0
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# only to revision <= r1p3 of the Cortex A57 cpu.
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ERRATA_A57_859972 ?=0
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# Flag to apply erratum 1319537 workaround during reset. This erratum applies
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# to all revisions of Cortex A57 cpu.
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ERRATA_A57_1319537 ?=0
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# Flag to apply erratum 855971 workaround during reset. This erratum applies
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# only to revision <= r0p3 of the Cortex A72 cpu.
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ERRATA_A72_859971 ?=0
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# Flag to apply erratum 1319367 workaround during reset. This erratum applies
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# to all revisions of Cortex A72 cpu.
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ERRATA_A72_1319367 ?=0
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# Flag to apply erratum 852427 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A73 cpu.
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ERRATA_A73_852427 ?=0
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@ -258,6 +274,10 @@ ERRATA_A76_1791580 ?=0
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# only to revision <= r4p0 of the Cortex A76 cpu.
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ERRATA_A76_1800710 ?=0
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# Flag to apply erratum 1165522 workaround during reset. This erratum applies
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# to all revisions of Cortex A76 cpu.
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ERRATA_A76_1165522 ?=0
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# Flag to apply erratum 1800714 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A77 cpu.
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ERRATA_A77_1800714 ?=0
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@ -379,6 +399,10 @@ $(eval $(call add_define,ERRATA_A53_843419))
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$(eval $(call assert_boolean,ERRATA_A53_855873))
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$(eval $(call add_define,ERRATA_A53_855873))
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# Process ERRATA_A53_1530924 flag
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$(eval $(call assert_boolean,ERRATA_A53_1530924))
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$(eval $(call add_define,ERRATA_A53_1530924))
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# Process ERRATA_A55_768277 flag
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$(eval $(call assert_boolean,ERRATA_A55_768277))
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$(eval $(call add_define,ERRATA_A55_768277))
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@ -403,6 +427,10 @@ $(eval $(call add_define,ERRATA_A55_903758))
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$(eval $(call assert_boolean,ERRATA_A55_1221012))
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$(eval $(call add_define,ERRATA_A55_1221012))
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# Process ERRATA_A55_1530923 flag
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$(eval $(call assert_boolean,ERRATA_A55_1530923))
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$(eval $(call add_define,ERRATA_A55_1530923))
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# Process ERRATA_A57_806969 flag
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$(eval $(call assert_boolean,ERRATA_A57_806969))
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$(eval $(call add_define,ERRATA_A57_806969))
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@ -447,10 +475,18 @@ $(eval $(call add_define,ERRATA_A57_833471))
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$(eval $(call assert_boolean,ERRATA_A57_859972))
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$(eval $(call add_define,ERRATA_A57_859972))
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# Process ERRATA_A57_1319537 flag
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$(eval $(call assert_boolean,ERRATA_A57_1319537))
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$(eval $(call add_define,ERRATA_A57_1319537))
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# Process ERRATA_A72_859971 flag
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$(eval $(call assert_boolean,ERRATA_A72_859971))
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$(eval $(call add_define,ERRATA_A72_859971))
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# Process ERRATA_A72_1319367 flag
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$(eval $(call assert_boolean,ERRATA_A72_1319367))
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$(eval $(call add_define,ERRATA_A72_1319367))
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# Process ERRATA_A73_852427 flag
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$(eval $(call assert_boolean,ERRATA_A73_852427))
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$(eval $(call add_define,ERRATA_A73_852427))
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@ -507,6 +543,10 @@ $(eval $(call add_define,ERRATA_A76_1791580))
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$(eval $(call assert_boolean,ERRATA_A76_1800710))
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$(eval $(call add_define,ERRATA_A76_1800710))
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# Process ERRATA_A76_1165522 flag
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$(eval $(call assert_boolean,ERRATA_A76_1165522))
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$(eval $(call add_define,ERRATA_A76_1165522))
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# Process ERRATA_A77_1800714 flag
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$(eval $(call assert_boolean,ERRATA_A77_1800714))
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$(eval $(call add_define,ERRATA_A77_1800714))
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@ -580,3 +620,10 @@ ifneq (${ERRATA_A53_835769},0)
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TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
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TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
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endif
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ifneq ($(filter 1,${ERRATA_A53_1530924} ${ERRATA_A55_1530923} \
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${ERRATA_A57_1319537} ${ERRATA_A72_1319367} ${ERRATA_A76_1165522}),)
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ERRATA_SPECULATIVE_AT := 1
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else
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ERRATA_SPECULATIVE_AT := 0
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endif
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