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Merge changes from topic "dummy_feat_aa32" into integration

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* changes:
  feat(cpufeat): deny AArch64-only features when building for AArch32
  feat(cpufeat): add AArch32 PAN detection support
This commit is contained in:
Manish Pandey 2023-06-06 16:50:36 +02:00 • committed by TrustedFirmware Code Review
commit e1c0a47267
3 changed files with 55 additions and 3 deletions
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5
include/arch/aarch32/arch.h
View file

@ -119,6 +119,10 @@
#define ID_DFR1_MTPMU_MASK U(0xf)
#define ID_DFR1_MTPMU_SUPPORTED U(1)
/* ID_MMFR3 definitions */
#define ID_MMFR3_PAN_SHIFT U(16)
#define ID_MMFR3_PAN_MASK U(0xf)
/* ID_MMFR4 definitions */
#define ID_MMFR4_CNP_SHIFT U(12)
#define ID_MMFR4_CNP_LENGTH U(4)
@ -533,6 +537,7 @@
#define DCISW p15, 0, c7, c6, 2
#define CTR p15, 0, c0, c0, 1
#define CNTFRQ p15, 0, c14, c0, 0
#define ID_MMFR3 p15, 0, c0, c1, 7
#define ID_MMFR4 p15, 0, c0, c2, 6
#define ID_DFR0 p15, 0, c0, c1, 2
#define ID_DFR1 p15, 0, c0, c3, 5

52
include/arch/aarch32/arch_features.h
View file

@ -110,10 +110,56 @@ static inline bool is_feat_dit_supported(void)
return read_feat_dit_id_field() != 0U;
}
static inline bool is_feat_spe_supported(void)
static inline unsigned int read_feat_pan_id_field(void)
{
/* FEAT_SPE is AArch64 only */
return false;
return ISOLATE_FIELD(read_id_mmfr3(), ID_MMFR3_PAN);
}
static inline bool is_feat_pan_supported(void)
{
if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
return false;
}
if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
return true;
}
return read_feat_pan_id_field() != 0U;
}
/*
* TWED, ECV, CSV2, RAS are only used by the AArch64 EL2 context switch
* code. In fact, EL2 context switching is only needed for AArch64 (since
* there is no secure AArch32 EL2), so just disable these features here.
*/
static inline bool is_feat_twed_supported(void) { return false; }
static inline bool is_feat_ecv_supported(void) { return false; }
static inline bool is_feat_ecv_v2_supported(void) { return false; }
static inline bool is_feat_csv2_2_supported(void) { return false; }
static inline bool is_feat_ras_supported(void) { return false; }
/* The following features are supported in AArch64 only. */
static inline bool is_feat_vhe_supported(void) { return false; }
static inline bool is_feat_sel2_supported(void) { return false; }
static inline bool is_feat_fgt_supported(void) { return false; }
static inline bool is_feat_tcr2_supported(void) { return false; }
static inline bool is_feat_spe_supported(void) { return false; }
static inline bool is_feat_rng_supported(void) { return false; }
static inline bool is_feat_gcs_supported(void) { return false; }
static inline bool is_feat_mpam_supported(void) { return false; }
static inline bool is_feat_hcx_supported(void) { return false; }
static inline bool is_feat_sve_supported(void) { return false; }
static inline bool is_feat_brbe_supported(void) { return false; }
static inline bool is_feat_trbe_supported(void) { return false; }
static inline bool is_feat_nv2_supported(void) { return false; }
static inline bool is_feat_sme_supported(void) { return false; }
static inline bool is_feat_sme2_supported(void) { return false; }
static inline bool is_feat_s2poe_supported(void) { return false; }
static inline bool is_feat_s1poe_supported(void) { return false; }
static inline bool is_feat_sxpoe_supported(void) { return false; }
static inline bool is_feat_s2pie_supported(void) { return false; }
static inline bool is_feat_s1pie_supported(void) { return false; }
static inline bool is_feat_sxpie_supported(void) { return false; }
#endif /* ARCH_FEATURES_H */

1
include/arch/aarch32/arch_helpers.h
View file

@ -217,6 +217,7 @@ DEFINE_SYSREG_RW_FUNCS(cpsr)
******************************************************************************/
DEFINE_COPROCR_READ_FUNC(mpidr, MPIDR)
DEFINE_COPROCR_READ_FUNC(midr, MIDR)
DEFINE_COPROCR_READ_FUNC(id_mmfr3, ID_MMFR3)
DEFINE_COPROCR_READ_FUNC(id_mmfr4, ID_MMFR4)
DEFINE_COPROCR_READ_FUNC(id_dfr0, ID_DFR0)
DEFINE_COPROCR_READ_FUNC(id_pfr0, ID_PFR0)