From e14ae4b30175d6c9877fd33497d43a8895f5b3d9 Mon Sep 17 00:00:00 2001
From: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
Date: Sun, 5 Jan 2025 23:55:02 -1200
Subject: [PATCH] fix(xilinx): dcc console tests failing

The commit a6485b2b3b2c ("refactor(delay-timer): add timer
callback functions") is breaking DCC console due to uninitialized
timer ops structure. Fix it by moving generic delay timer init
prior to console setup to make sure that time is setup before DCC
console setup.

Fixes: a6485b2b3b2c ("refactor(delay-timer): add timer callback
functions")

Change-Id: I67910332773741c0b08f02feb232efab6356db12
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
---
 plat/amd/versal2/bl31_setup.c                  |  6 +++---
 plat/xilinx/versal_net/bl31_versal_net_setup.c |  5 +++--
 plat/xilinx/zynqmp/aarch64/zynqmp_common.c     | 11 -----------
 plat/xilinx/zynqmp/bl31_zynqmp_setup.c         | 10 ++++++++++
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/plat/amd/versal2/bl31_setup.c b/plat/amd/versal2/bl31_setup.c
index 6e7fffec5..68d19a7a3 100644
--- a/plat/amd/versal2/bl31_setup.c
+++ b/plat/amd/versal2/bl31_setup.c
@@ -127,14 +127,14 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 
 	uart_clock = get_uart_clk();
 
+	/* Initialize the platform config for future decision making */
+	config_setup();
+
 	setup_console();
 
 	NOTICE("TF-A running on %s %d.%d\n", board_name_decode(),
 	       platform_version / 10U, platform_version % 10U);
 
-	/* Initialize the platform config for future decision making */
-	config_setup();
-
 	/*
 	 * Do initial security configuration to allow DRAM/device access. On
 	 * Base only DRAM security is programmable (via TrustZone), but
diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c
index faeeda086..b1fdd9c24 100644
--- a/plat/xilinx/versal_net/bl31_versal_net_setup.c
+++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c
@@ -117,6 +117,9 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 
 	set_cnt_freq();
 
+	/* Initialize the platform config for future decision making */
+	versal_net_config_setup();
+
 	setup_console();
 
 	NOTICE("TF-A running on %s %d.%d\n", board_name_decode(),
@@ -124,8 +127,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 
 	versal_net_setup_qos();
 
-	/* Initialize the platform config for future decision making */
-	versal_net_config_setup();
 
 	/*
 	 * Do initial security configuration to allow DRAM/device access. On
diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index 1361eda88..6c31a8a4a 100644
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -9,7 +9,6 @@
 #include <string.h>
 
 #include <common/debug.h>
-#include <drivers/generic_delay_timer.h>
 #include <lib/mmio.h>
 #include <lib/smccc.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
@@ -389,20 +388,10 @@ uint32_t zynqmp_get_bootmode(void)
 
 void zynqmp_config_setup(void)
 {
-	uint64_t counter_freq;
-
 	/* Configure IPI data for ZynqMP */
 	zynqmp_ipi_config_table_init();
 
 	zynqmp_print_platform_name();
-
-	/* Configure counter frequency */
-	counter_freq = read_cntfrq_el0();
-	if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) {
-		write_cntfrq_el0(plat_get_syscnt_freq2());
-	}
-
-	generic_delay_timer_init();
 }
 
 uint32_t plat_get_syscnt_freq2(void)
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index 77fbb58f8..b29e1c61f 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -13,6 +13,7 @@
 #include <common/debug.h>
 #include <common/fdt_fixup.h>
 #include <common/fdt_wrappers.h>
+#include <drivers/generic_delay_timer.h>
 #include <lib/mmio.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
 #include <libfdt.h>
@@ -77,6 +78,15 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 	(void)arg2;
 	(void)arg3;
 	uint64_t tfa_handoff_addr;
+	uint64_t counter_freq;
+
+	/* Configure counter frequency */
+	counter_freq = read_cntfrq_el0();
+	if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) {
+		write_cntfrq_el0(plat_get_syscnt_freq2());
+	}
+
+	generic_delay_timer_init();
 
 	setup_console();