mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-23 21:44:15 +00:00
feat(stm32mp1): add FWU with boot from NOR-SPI
Refactor the SDCARD/EMMC FWU, to add the NOR-SPI use case. SPI-NOR FWU won't use a real partition uuid to find the correct FIP, but the UUID from metadata will correspond with a hardcoded offset in the NOR. While at it change some __unused keywords to __maybe_unused to ease checkpatch.pl analysis. Signed-off-by: Frank Bodammer <frank.bodammer@siemens.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I2fe56ba8534a3c5dfaf8aeb16e7b286909883cc2
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83fde9fcdf
commit
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3 changed files with 118 additions and 53 deletions
plat/st
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -222,7 +222,7 @@ static void print_boot_device(boot_api_context_t *boot_context)
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static void boot_mmc(enum mmc_device_type mmc_dev_type,
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uint16_t boot_interface_instance)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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struct stm32_sdmmc2_params params;
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zeromem(¶ms, sizeof(struct stm32_sdmmc2_params));
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@ -294,7 +294,7 @@ static void boot_mmc(enum mmc_device_type mmc_dev_type,
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#if STM32MP_SPI_NOR
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static void boot_spi_nor(boot_api_context_t *boot_context)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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io_result = stm32_qspi_init();
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assert(io_result == 0);
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@ -313,7 +313,7 @@ static void boot_spi_nor(boot_api_context_t *boot_context)
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#if STM32MP_RAW_NAND
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static void boot_fmc2_nand(boot_api_context_t *boot_context)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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io_result = stm32_fmc2_init();
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assert(io_result == 0);
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@ -332,7 +332,7 @@ static void boot_fmc2_nand(boot_api_context_t *boot_context)
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#if STM32MP_SPI_NAND
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static void boot_spi_nand(boot_api_context_t *boot_context)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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io_result = stm32_qspi_init();
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assert(io_result == 0);
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@ -351,7 +351,7 @@ static void boot_spi_nand(boot_api_context_t *boot_context)
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#if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
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static void mmap_io_setup(void)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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io_result = register_io_dev_memmap(&memmap_dev_con);
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assert(io_result == 0);
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@ -364,7 +364,7 @@ static void mmap_io_setup(void)
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#if STM32MP_UART_PROGRAMMER
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static void stm32cubeprogrammer_uart(void)
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{
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int ret __unused;
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int ret __maybe_unused;
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boot_api_context_t *boot_context =
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(boot_api_context_t *)stm32mp_get_boot_ctx_address();
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uintptr_t uart_base;
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@ -378,7 +378,7 @@ static void stm32cubeprogrammer_uart(void)
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#if STM32MP_USB_PROGRAMMER
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static void stm32cubeprogrammer_usb(void)
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{
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int ret __unused;
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int ret __maybe_unused;
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struct usb_handle *pdev;
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/* Init USB on platform */
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@ -390,10 +390,9 @@ static void stm32cubeprogrammer_usb(void)
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#endif
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#endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */
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void stm32mp_io_setup(void)
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{
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int io_result __unused;
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int io_result __maybe_unused;
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boot_api_context_t *boot_context =
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(boot_api_context_t *)stm32mp_get_boot_ctx_address();
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@ -473,7 +472,7 @@ void stm32mp_io_setup(void)
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int bl2_plat_handle_pre_image_load(unsigned int image_id)
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{
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static bool gpt_init_done __unused;
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static bool gpt_init_done __maybe_unused;
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uint16_t boot_itf = stm32mp_get_boot_itf_selected();
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switch (boot_itf) {
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@ -516,6 +515,7 @@ int bl2_plat_handle_pre_image_load(unsigned int image_id)
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gpt_init_done = true;
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} else {
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bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
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assert(bl_mem_params != NULL);
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mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base;
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@ -538,7 +538,14 @@ int bl2_plat_handle_pre_image_load(unsigned int image_id)
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#if STM32MP_SPI_NOR
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
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/*
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* With FWU Multi Bank feature enabled, the selection of
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* the image to boot will be done by fwu_init calling the
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* platform hook, plat_fwu_set_images_source.
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*/
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#if !PSA_FWU_SUPPORT
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image_block_spec.offset = STM32MP_NOR_FIP_OFFSET;
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#endif
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break;
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#endif
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@ -591,7 +598,7 @@ int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
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return rc;
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}
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#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
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#if (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT
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/*
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* In each boot in non-trial mode, we set the BKP register to
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* FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata.
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@ -652,54 +659,108 @@ void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
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{
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unsigned int i;
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uint32_t boot_idx;
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const partition_entry_t *entry;
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const uuid_t *img_type_uuid, *img_uuid;
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const partition_entry_t *entry __maybe_unused;
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const uuid_t *img_type_uuid;
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const uuid_t *img_uuid __maybe_unused;
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io_block_spec_t *image_spec;
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const uint16_t boot_itf = stm32mp_get_boot_itf_selected();
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boot_idx = plat_fwu_get_boot_idx();
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assert(boot_idx < NR_OF_FW_BANKS);
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for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
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img_type_uuid = &metadata->img_entry[i].img_type_uuid;
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img_uuid = &metadata->img_entry[i].img_props[boot_idx].img_uuid;
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image_spec = stm32_get_image_spec(img_type_uuid);
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if (image_spec == NULL) {
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ERROR("Unable to get image spec for the image in the metadata\n");
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panic();
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}
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img_uuid =
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&metadata->img_entry[i].img_props[boot_idx].img_uuid;
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switch (boot_itf) {
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#if (STM32MP_SDMMC || STM32MP_EMMC)
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
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entry = get_partition_entry_by_uuid(img_uuid);
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if (entry == NULL) {
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ERROR("No partition with the uuid mentioned in metadata\n");
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panic();
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}
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entry = get_partition_entry_by_uuid(img_uuid);
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if (entry == NULL) {
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ERROR("Unable to find the partition with the uuid mentioned in metadata\n");
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image_spec->offset = entry->start;
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image_spec->length = entry->length;
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break;
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#endif
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#if STM32MP_SPI_NOR
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
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if (guidcmp(img_uuid, &STM32MP_NOR_FIP_A_GUID) == 0) {
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image_spec->offset = STM32MP_NOR_FIP_A_OFFSET;
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} else if (guidcmp(img_uuid, &STM32MP_NOR_FIP_B_GUID) == 0) {
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image_spec->offset = STM32MP_NOR_FIP_B_OFFSET;
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} else {
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ERROR("Invalid uuid mentioned in metadata\n");
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panic();
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}
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break;
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#endif
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default:
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panic();
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break;
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}
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image_spec->offset = entry->start;
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image_spec->length = entry->length;
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}
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}
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static int plat_set_image_source(unsigned int image_id,
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uintptr_t *handle,
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uintptr_t *image_spec,
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const char *part_name)
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uintptr_t *image_spec)
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{
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struct plat_io_policy *policy;
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io_block_spec_t *spec;
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const partition_entry_t *entry = get_partition_entry(part_name);
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if (entry == NULL) {
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ERROR("Unable to find the %s partition\n", part_name);
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return -ENOENT;
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}
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io_block_spec_t *spec __maybe_unused;
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const partition_entry_t *entry __maybe_unused;
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const uint16_t boot_itf = stm32mp_get_boot_itf_selected();
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policy = &policies[image_id];
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spec = (io_block_spec_t *)policy->image_spec;
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spec->offset = entry->start;
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spec->length = entry->length;
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switch (boot_itf) {
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#if (STM32MP_SDMMC || STM32MP_EMMC)
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
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partition_init(GPT_IMAGE_ID);
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if (image_id == FWU_METADATA_IMAGE_ID) {
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entry = get_partition_entry(METADATA_PART_1);
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} else {
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entry = get_partition_entry(METADATA_PART_2);
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}
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if (entry == NULL) {
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ERROR("Unable to find a metadata partition\n");
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return -ENOENT;
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}
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spec->offset = entry->start;
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spec->length = entry->length;
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break;
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#endif
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#if STM32MP_SPI_NOR
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
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if (image_id == FWU_METADATA_IMAGE_ID) {
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spec->offset = STM32MP_NOR_METADATA1_OFFSET;
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} else {
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spec->offset = STM32MP_NOR_METADATA2_OFFSET;
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}
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spec->length = sizeof(struct fwu_metadata);
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break;
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#endif
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default:
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panic();
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break;
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}
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*image_spec = policy->image_spec;
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*handle = *policy->dev_handle;
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uintptr_t *handle,
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uintptr_t *image_spec)
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{
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char *part_name;
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assert((image_id == FWU_METADATA_IMAGE_ID) ||
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(image_id == BKUP_FWU_METADATA_IMAGE_ID));
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partition_init(GPT_IMAGE_ID);
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if (image_id == FWU_METADATA_IMAGE_ID) {
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part_name = METADATA_PART_1;
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} else {
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part_name = METADATA_PART_2;
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}
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return plat_set_image_source(image_id, handle, image_spec,
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part_name);
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return plat_set_image_source(image_id, handle, image_spec);
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}
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
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* Copyright (c) 2021-2023, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,12 +27,12 @@ static io_block_spec_t gpt_block_spec = {
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};
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#endif
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#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
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#if (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT
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static io_block_spec_t metadata_block_spec = {
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.offset = 0, /* To be filled at runtime */
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.length = 0, /* To be filled at runtime */
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};
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT */
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/* By default, STM32 platforms load images from the FIP */
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struct plat_io_policy policies[MAX_NUMBER_IDS] = {
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.check = open_storage
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},
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#endif
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#if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
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#if (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT
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[FWU_METADATA_IMAGE_ID] = {
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.dev_handle = &storage_dev_handle,
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.image_spec = (uintptr_t)&metadata_block_spec,
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.img_type_guid = NULL_GUID,
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.check = open_storage
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},
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
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#endif /* (STM32MP_SDMMC || STM32MP_EMMC || STM32MP_SPI_NOR) && PSA_FWU_SUPPORT */
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};
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#define DEFAULT_UUID_NUMBER U(7)
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2021-2022, STMicroelectronics - All Rights Reserved
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* Copyright (C) 2021-2023, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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* STM32MP1 RAW partition offset for devices without GPT
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******************************************************************************/
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#define STM32MP_EMMC_BOOT_FIP_OFFSET U(0x00040000)
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#if PSA_FWU_SUPPORT
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#define STM32MP_NOR_METADATA1_OFFSET U(0x00080000)
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#define STM32MP_NOR_METADATA2_OFFSET U(0x000C0000)
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#define STM32MP_NOR_FIP_A_OFFSET U(0x00100000)
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#define STM32MP_NOR_FIP_A_GUID (const struct efi_guid)EFI_GUID(0x4fd84c93, \
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0x54ef, 0x463f, 0xa7, 0xef, 0xae, 0x25, 0xff,\
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0x88, 0x70, 0x87)
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#define STM32MP_NOR_FIP_B_OFFSET U(0x00500000)
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#define STM32MP_NOR_FIP_B_GUID (const struct efi_guid)EFI_GUID(0x09c54952, \
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0xd5bf, 0x45af, 0xac, 0xee, 0x33, 0x53, 0x03,\
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0x76, 0x6f, 0xb3)
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#else /* PSA_FWU_SUPPORT */
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#ifndef STM32MP_NOR_FIP_OFFSET
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#define STM32MP_NOR_FIP_OFFSET U(0x00080000)
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#endif
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#ifndef STM32MP_NAND_FIP_OFFSET
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#define STM32MP_NAND_FIP_OFFSET U(0x00200000)
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#endif
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#endif /* PSA_FWU_SUPPORT */
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#endif /* STM32MP1_FIP_DEF_H */
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