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feat(nxp-dcfg): add Chassis 3 support
Add support for Chassis 3. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I85cf68d4f1db81bf344e34dce13799ae173aa23a
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2 changed files with 5 additions and 8 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright 2020-2021 NXP
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* Copyright 2020-2022 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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@ -74,14 +74,11 @@ const devdisr5_info_t *get_devdisr5_info(void)
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reg = gur_in32(dcfg_init_info->g_nxp_dcfg_addr + DCFG_DEVDISR5_OFFSET);
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devdisr5_info.ddrc1_present = (reg & DISR5_DDRC1_MASK) ? 0 : 1;
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#if defined(CONFIG_CHASSIS_3_2)
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devdisr5_info.ddrc1_present = (reg & DISR5_DDRC1_MASK) ? 0 : 1;
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devdisr5_info.ddrc2_present = (reg & DISR5_DDRC2_MASK) ? 0 : 1;
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devdisr5_info.ocram_present = (reg & DISR5_OCRAM_MASK) ? 0 : 1;
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#elif defined(CONFIG_CHASSIS_2)
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devdisr5_info.ddrc1_present = (reg & DISR5_DDRC1_MASK) ? 0 : 1;
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devdisr5_info.ocram_present = (reg & DISR5_OCRAM_MASK) ? 0 : 1;
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#endif
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devdisr5_info.ocram_present = (reg & DISR5_OCRAM_MASK) ? 0 : 1;
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devdisr5_info.is_populated = true;
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return (const devdisr5_info_t *) &devdisr5_info;
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@ -1,5 +1,5 @@
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/*
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* Copyright 2018-2021 NXP
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* Copyright 2018-2022 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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@ -12,7 +12,7 @@
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#if defined(CONFIG_CHASSIS_2)
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#include <dcfg_lsch2.h>
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#elif defined(CONFIG_CHASSIS_3_2)
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#elif defined(CONFIG_CHASSIS_3_2) || defined(CONFIG_CHASSIS_3)
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#include <dcfg_lsch3.h>
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#endif
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