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Merge "fix(spmd): prevent SIMD context loss" into integration
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commit
dd9be1160a
1 changed files with 3 additions and 7 deletions
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2025, Arm Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -222,6 +222,7 @@ static uint64_t spmd_secure_interrupt_handler(uint32_t id,
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* in this scenario where execution was trapped to EL3 due to FIQ.
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* in this scenario where execution was trapped to EL3 due to FIQ.
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*/
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*/
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simd_ctx_save(NON_SECURE, false);
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simd_ctx_save(NON_SECURE, false);
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simd_ctx_restore(SECURE);
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#endif
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#endif
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#endif
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#endif
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@ -238,14 +239,8 @@ static uint64_t spmd_secure_interrupt_handler(uint32_t id,
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/* Mark current core as handling a secure interrupt. */
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/* Mark current core as handling a secure interrupt. */
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ctx->secure_interrupt_ongoing = true;
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ctx->secure_interrupt_ongoing = true;
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#if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
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simd_ctx_restore(SECURE);
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#endif
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rc = spmd_spm_core_sync_entry(ctx);
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rc = spmd_spm_core_sync_entry(ctx);
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#if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
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simd_ctx_save(SECURE, false);
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#endif
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if (rc != 0ULL) {
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if (rc != 0ULL) {
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ERROR("%s failed (%" PRId64 ") on CPU%u\n", __func__, rc, plat_my_core_pos());
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ERROR("%s failed (%" PRId64 ") on CPU%u\n", __func__, rc, plat_my_core_pos());
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}
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}
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@ -258,6 +253,7 @@ static uint64_t spmd_secure_interrupt_handler(uint32_t id,
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cm_el1_sysregs_context_restore(NON_SECURE);
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cm_el1_sysregs_context_restore(NON_SECURE);
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#if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
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#if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
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simd_ctx_save(SECURE, false);
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simd_ctx_restore(NON_SECURE);
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simd_ctx_restore(NON_SECURE);
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#endif
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#endif
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#endif
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#endif
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