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refactor(cpus): reorder Cortex-A78 errata by ascending order

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Change-Id: I433b2b1e5b3604bb0a13d167167b0f86255c6903
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
This commit is contained in:
Govindraj Raja 2023-06-15 12:39:48 -05:00
parent cc0fc5526a
commit dd0dbe4445
1 changed files with 30 additions and 30 deletions
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60
lib/cpus/aarch64/cortex_a78.S
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019-2023, ARM Limited. All rights reserved. * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -51,6 +51,34 @@ func check_errata_1688305
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_1688305 endfunc check_errata_1688305
/* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata #1821534.
* This applies to revisions r0p0 and r1p0.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_a78_1821534_wa
/* Check revision. */
mov x17, x30
bl check_errata_1821534
cbz x0, 1f
/* Set bit 2 in ACTLR2_EL1 */
mrs x1, CORTEX_A78_ACTLR2_EL1
orr x1, x1, #CORTEX_A78_ACTLR2_EL1_BIT_2
msr CORTEX_A78_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_a78_1821534_wa
func check_errata_1821534
/* Applies to r0p0 and r1p0 */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1821534
/* -------------------------------------------------- /* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata #1941498. * Errata Workaround for Cortex A78 Errata #1941498.
* This applies to revisions r0p0, r1p0, and r1p1. * This applies to revisions r0p0, r1p0, and r1p1.
@ -133,34 +161,6 @@ func check_errata_1951500
b cpu_rev_var_range b cpu_rev_var_range
endfunc check_errata_1951500 endfunc check_errata_1951500
/* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata #1821534.
* This applies to revisions r0p0 and r1p0.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_a78_1821534_wa
/* Check revision. */
mov x17, x30
bl check_errata_1821534
cbz x0, 1f
/* Set bit 2 in ACTLR2_EL1 */
mrs x1, CORTEX_A78_ACTLR2_EL1
orr x1, x1, #CORTEX_A78_ACTLR2_EL1_BIT_2
msr CORTEX_A78_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_a78_1821534_wa
func check_errata_1821534
/* Applies to r0p0 and r1p0 */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1821534
/* -------------------------------------------------- /* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata 1952683. * Errata Workaround for Cortex A78 Errata 1952683.
* This applies to revision r0p0. * This applies to revision r0p0.
@ -553,9 +553,9 @@ func cortex_a78_errata_report
* checking functions of each errata. * checking functions of each errata.
*/ */
report_errata ERRATA_A78_1688305, cortex_a78, 1688305 report_errata ERRATA_A78_1688305, cortex_a78, 1688305
report_errata ERRATA_A78_1821534, cortex_a78, 1821534
report_errata ERRATA_A78_1941498, cortex_a78, 1941498 report_errata ERRATA_A78_1941498, cortex_a78, 1941498
report_errata ERRATA_A78_1951500, cortex_a78, 1951500 report_errata ERRATA_A78_1951500, cortex_a78, 1951500
report_errata ERRATA_A78_1821534, cortex_a78, 1821534
report_errata ERRATA_A78_1952683, cortex_a78, 1952683 report_errata ERRATA_A78_1952683, cortex_a78, 1952683
report_errata ERRATA_A78_2132060, cortex_a78, 2132060 report_errata ERRATA_A78_2132060, cortex_a78, 2132060
report_errata ERRATA_A78_2242635, cortex_a78, 2242635 report_errata ERRATA_A78_2242635, cortex_a78, 2242635