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feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections

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Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM
can be used. It reduces the binary size by removing all relocation
sections. XIP will not be used when STM32MP_USE_STM32IMAGE is
defined. Introduce new definitions for SEPARATE_CODE_AND_RODATA.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ifd76f14e5bc98990bf84e0bfd4ee0b4e49a9a293
This commit is contained in:
Yann Gautier 2021-09-15 11:30:25 +02:00 • committed by Yann Gautier
parent ac1b24d58a
commit d958d10eb3
4 changed files with 28 additions and 6 deletions
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9
plat/st/stm32mp1/include/platform_def.h
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -68,6 +68,13 @@
#define BL2_LIMIT (STM32MP_BL2_BASE + \ #define BL2_LIMIT (STM32MP_BL2_BASE + \
STM32MP_BL2_SIZE) STM32MP_BL2_SIZE)
#define BL2_RO_BASE STM32MP_BL2_RO_BASE
#define BL2_RO_LIMIT (STM32MP_BL2_RO_BASE + \
STM32MP_BL2_RO_SIZE)
#define BL2_RW_BASE STM32MP_BL2_RW_BASE
#define BL2_RW_LIMIT (STM32MP_BL2_RW_BASE + \
STM32MP_BL2_RW_SIZE)
/******************************************************************************* /*******************************************************************************
* BL32 specific defines. * BL32 specific defines.
******************************************************************************/ ******************************************************************************/

1
plat/st/stm32mp1/platform.mk
View file

@ -16,6 +16,7 @@ STM32MP_USE_STM32IMAGE ?= 0
ifneq ($(STM32MP_USE_STM32IMAGE),1) ifneq ($(STM32MP_USE_STM32IMAGE),1)
ENABLE_PIE := 1 ENABLE_PIE := 1
BL2_IN_XIP_MEM := 1
endif endif
STM32_TF_VERSION ?= 0 STM32_TF_VERSION ?= 0

6
plat/st/stm32mp1/stm32mp1.ld.S
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -57,7 +57,11 @@ SECTIONS
* The strongest and only alignment contraint is MMU 4K page. * The strongest and only alignment contraint is MMU 4K page.
* Indeed as images below will be removed, 4K pages will be re-used. * Indeed as images below will be removed, 4K pages will be re-used.
*/ */
#if SEPARATE_CODE_AND_RODATA
. = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
#else
. = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE ); . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
#endif
__BL2_IMAGE_START__ = .; __BL2_IMAGE_START__ = .;
*(.bl2_image*) *(.bl2_image*)
__BL2_IMAGE_END__ = .; __BL2_IMAGE_END__ = .;

18
plat/st/stm32mp1/stm32mp1_fip_def.h
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2021, STMicroelectronics - All Rights Reserved * Copyright (C) 2021-2022, STMicroelectronics - All Rights Reserved
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -10,9 +10,10 @@
#define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */ #define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */
#define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */ #define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */
#define STM32MP_BL2_SIZE U(0x0001B000) /* 108 KB for BL2 */ #define STM32MP_BL2_RO_SIZE U(0x00011000) /* 68 KB */
#define STM32MP_BL2_DTB_SIZE U(0x00006000) /* 24 KB for DTB */ #define STM32MP_BL2_SIZE U(0x00016000) /* 88 KB for BL2 */
#define STM32MP_BL32_SIZE U(0x00019000) /* 100 KB for BL32 */ #define STM32MP_BL2_DTB_SIZE U(0x00007000) /* 28 KB for DTB */
#define STM32MP_BL32_SIZE U(0x0001B000) /* 108 KB for BL32 */
#define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */ #define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
#define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */ #define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */
#define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */ #define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */
@ -21,6 +22,15 @@
STM32MP_SEC_SYSRAM_SIZE - \ STM32MP_SEC_SYSRAM_SIZE - \
STM32MP_BL2_SIZE) STM32MP_BL2_SIZE)
#define STM32MP_BL2_RO_BASE STM32MP_BL2_BASE
#define STM32MP_BL2_RW_BASE (STM32MP_BL2_RO_BASE + \
STM32MP_BL2_RO_SIZE)
#define STM32MP_BL2_RW_SIZE (STM32MP_SEC_SYSRAM_BASE + \
STM32MP_SEC_SYSRAM_SIZE - \
STM32MP_BL2_RW_BASE)
#define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \ #define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \
STM32MP_BL2_DTB_SIZE) STM32MP_BL2_DTB_SIZE)