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https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-21 20:14:29 +00:00
refactor(st): move boot backup register management
This backup register used to pass boot information to BL33, has the same mapping for ST platforms. Its management can then be moved to common directory. Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ic873f099c1f87c6ba2825b4946365ae6a9687798
This commit is contained in:
Yann Gautier
parent
e2dcf8b4fe
commit
d8da13e543
5 changed files with 76 additions and 62 deletions
plat/st
common
stm32mp1
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2022, STMicroelectronics - All Rights Reserved
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* Copyright (C) 2018-2023, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -113,12 +113,12 @@ void stm32mp_io_setup(void);
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int stm32mp_map_ddr_non_cacheable(void);
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int stm32mp_unmap_ddr(void);
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/* Functions to save and get boot peripheral info */
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void stm32_save_boot_interface(uint32_t interface, uint32_t instance);
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/* Function to save boot info */
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void stm32_save_boot_info(boot_api_context_t *boot_context);
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/* Function to get boot peripheral info */
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void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance);
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/* Functions to save and get boot authentication status and partition used */
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void stm32_save_boot_auth(uint32_t auth_status, uint32_t boot_partition);
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/* Function to get BOOT_MODE backup register address */
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uintptr_t stm32_get_bkpr_boot_mode_addr(void);
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#if PSA_FWU_SUPPORT
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void stm32mp1_fwu_set_boot_idx(void);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,6 +14,7 @@
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#include <drivers/st/stm32_console.h>
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#include <drivers/st/stm32mp_clkfunc.h>
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#include <drivers/st/stm32mp_reset.h>
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#include <lib/mmio.h>
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#include <lib/smccc.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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@ -24,6 +25,15 @@
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#define HEADER_VERSION_MAJOR_MASK GENMASK(23, 16)
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#define RESET_TIMEOUT_US_1MS 1000U
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#define BOOT_AUTH_MASK GENMASK_32(23, 20)
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#define BOOT_AUTH_SHIFT 20
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#define BOOT_PART_MASK GENMASK_32(19, 16)
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#define BOOT_PART_SHIFT 16
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#define BOOT_ITF_MASK GENMASK_32(15, 12)
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#define BOOT_ITF_SHIFT 12
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#define BOOT_INST_MASK GENMASK_32(11, 8)
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#define BOOT_INST_SHIFT 8
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static console_t console;
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uintptr_t plat_get_ns_image_entrypoint(void)
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@ -277,3 +287,55 @@ int32_t plat_get_soc_revision(void)
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{
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return (int32_t)(stm32mp_get_chip_version() & SOC_ID_REV_MASK);
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}
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void stm32_save_boot_info(boot_api_context_t *boot_context)
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{
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uint32_t auth_status;
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assert(boot_context->boot_interface_instance <= (BOOT_INST_MASK >> BOOT_INST_SHIFT));
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assert(boot_context->boot_interface_selected <= (BOOT_ITF_MASK >> BOOT_ITF_SHIFT));
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assert(boot_context->boot_partition_used_toboot <= (BOOT_PART_MASK >> BOOT_PART_SHIFT));
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switch (boot_context->auth_status) {
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case BOOT_API_CTX_AUTH_NO:
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auth_status = 0x0U;
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break;
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case BOOT_API_CTX_AUTH_SUCCESS:
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auth_status = 0x2U;
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break;
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case BOOT_API_CTX_AUTH_FAILED:
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default:
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auth_status = 0x1U;
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break;
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}
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clk_enable(TAMP_BKP_REG_CLK);
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mmio_clrsetbits_32(stm32_get_bkpr_boot_mode_addr(),
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BOOT_ITF_MASK | BOOT_INST_MASK | BOOT_PART_MASK | BOOT_AUTH_MASK,
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(boot_context->boot_interface_instance << BOOT_INST_SHIFT) |
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(boot_context->boot_interface_selected << BOOT_ITF_SHIFT) |
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(boot_context->boot_partition_used_toboot << BOOT_PART_SHIFT) |
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(auth_status << BOOT_AUTH_SHIFT));
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clk_disable(TAMP_BKP_REG_CLK);
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}
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void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance)
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{
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static uint32_t itf;
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if (itf == 0U) {
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clk_enable(TAMP_BKP_REG_CLK);
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itf = mmio_read_32(stm32_get_bkpr_boot_mode_addr()) &
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(BOOT_ITF_MASK | BOOT_INST_MASK);
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clk_disable(TAMP_BKP_REG_CLK);
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}
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*interface = (itf & BOOT_ITF_MASK) >> BOOT_ITF_SHIFT;
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*instance = (itf & BOOT_INST_MASK) >> BOOT_INST_SHIFT;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -290,10 +290,7 @@ void bl2_el3_plat_arch_setup(void)
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panic();
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}
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stm32_save_boot_interface(boot_context->boot_interface_selected,
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boot_context->boot_interface_instance);
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stm32_save_boot_auth(boot_context->auth_status,
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boot_context->boot_partition_used_toboot);
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stm32_save_boot_info(boot_context);
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#if STM32MP_USB_PROGRAMMER && STM32MP15
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/* Deconfigure all UART RX pins configured by ROM code */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -548,6 +548,7 @@ enum ddr_type {
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******************************************************************************/
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#define TAMP_BASE U(0x5C00A000)
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#define TAMP_BKP_REGISTER_BASE (TAMP_BASE + U(0x100))
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#define TAMP_BKP_REG_CLK RTCAPB
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#define TAMP_COUNTR U(0x40)
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#if !(defined(__LINKER__) || defined(__ASSEMBLER__))
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -43,10 +43,6 @@
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#if STM32MP15
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#define TAMP_BOOT_MODE_BACKUP_REG_ID U(20)
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#endif
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#define TAMP_BOOT_MODE_ITF_MASK GENMASK(15, 8)
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#define TAMP_BOOT_MODE_ITF_SHIFT 8
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#define TAMP_BOOT_MODE_AUTH_MASK GENMASK(23, 16)
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#define TAMP_BOOT_MODE_AUTH_SHIFT 16
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/*
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* Backup register to store fwu update information.
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@ -697,51 +693,9 @@ uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags)
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}
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#endif
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void stm32_save_boot_interface(uint32_t interface, uint32_t instance)
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uintptr_t stm32_get_bkpr_boot_mode_addr(void)
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{
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uintptr_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
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clk_enable(RTCAPB);
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mmio_clrsetbits_32(bkpr_itf_idx,
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TAMP_BOOT_MODE_ITF_MASK,
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((interface << 4) | (instance & 0xFU)) <<
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TAMP_BOOT_MODE_ITF_SHIFT);
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clk_disable(RTCAPB);
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}
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void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance)
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{
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static uint32_t itf;
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if (itf == 0U) {
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uintptr_t bkpr = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
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clk_enable(RTCAPB);
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itf = (mmio_read_32(bkpr) & TAMP_BOOT_MODE_ITF_MASK) >>
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TAMP_BOOT_MODE_ITF_SHIFT;
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clk_disable(RTCAPB);
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}
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*interface = itf >> 4;
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*instance = itf & 0xFU;
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}
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void stm32_save_boot_auth(uint32_t auth_status, uint32_t boot_partition)
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{
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uint32_t boot_status = tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
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clk_enable(RTCAPB);
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mmio_clrsetbits_32(boot_status,
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TAMP_BOOT_MODE_AUTH_MASK,
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((auth_status << 4) | (boot_partition & 0xFU)) <<
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TAMP_BOOT_MODE_AUTH_SHIFT);
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clk_disable(RTCAPB);
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return tamp_bkpr(TAMP_BOOT_MODE_BACKUP_REG_ID);
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}
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#if PSA_FWU_SUPPORT
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