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fix(cpus): workaround for Cortex-A710 erratum 2742423

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Cortex-A710 erratum 2742423 is a Cat B erratum that applies to all
revisions <= r2p1 and is still open. The workaround is to set
CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775101/latest

Change-Id: I4d9d3760491f1e6c59b2667c16d59b99cc7979f1
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
This commit is contained in:
Bipin Ravi 2023-10-17 07:55:55 -05:00 • committed by laurenw-arm
parent 68085ad482
commit d7bc2cb430
4 changed files with 20 additions and 2 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -612,6 +612,10 @@ For Cortex-A710, the following errata build flags are defined :
interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and
is still open. is still open.
- ``ERRATA_A710_2742423``: This applies errata 2742423 workaround to
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
r2p1 of the CPU and is still open.
- ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to - ``ERRATA_A710_2768515``: This applies errata 2768515 workaround to
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
r2p1 of the CPU and is still open. r2p1 of the CPU and is still open.

8
lib/cpus/aarch64/cortex_a710.S
View file

@ -178,6 +178,14 @@ workaround_reset_end cortex_a710, ERRATUM(2371105)
check_erratum_ls cortex_a710, ERRATUM(2371105), CPU_REV(2, 0) check_erratum_ls cortex_a710, ERRATUM(2371105), CPU_REV(2, 0)
workaround_reset_start cortex_a710, ERRATUM(2742423), ERRATA_A710_2742423
/* Set CPUACTLR5_EL1[56:55] to 2'b01 */
sysreg_bit_set CORTEX_A710_CPUACTLR5_EL1, BIT(55)
sysreg_bit_clear CORTEX_A710_CPUACTLR5_EL1, BIT(56)
workaround_reset_end cortex_a710, ERRATUM(2742423)
check_erratum_ls cortex_a710, ERRATUM(2742423), CPU_REV(2, 1)
workaround_runtime_start cortex_a710, ERRATUM(2768515), ERRATA_A710_2768515 workaround_runtime_start cortex_a710, ERRATUM(2768515), ERRATA_A710_2768515
/* dsb before isb of power down sequence */ /* dsb before isb of power down sequence */
dsb sy dsb sy

5
lib/cpus/cpu-ops.mk
View file

@ -607,6 +607,11 @@ CPU_FLAG_LIST += ERRATA_A710_2371105
# and is still open. # and is still open.
CPU_FLAG_LIST += ERRATA_A710_2701952 CPU_FLAG_LIST += ERRATA_A710_2701952
# Flag to apply erratum 2742423 workaround during reset. This erratum applies
# to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is still
# open.
CPU_FLAG_LIST += ERRATA_A710_2742423
# Flag to apply erratum 2768515 workaround during power down. This erratum # Flag to apply erratum 2768515 workaround during power down. This erratum
# applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is # applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-A710 cpu and is
# still open. # still open.

5
services/std_svc/errata_abi/errata_abi_main.c
View file

@ -328,8 +328,9 @@ struct em_cpu_list cpu_list[] = {
[13] = {2371105, 0x00, 0x20, ERRATA_A710_2371105}, [13] = {2371105, 0x00, 0x20, ERRATA_A710_2371105},
[14] = {2701952, 0x00, 0x21, ERRATA_A710_2701952, \ [14] = {2701952, 0x00, 0x21, ERRATA_A710_2701952, \
ERRATA_NON_ARM_INTERCONNECT}, ERRATA_NON_ARM_INTERCONNECT},
[15] = {2768515, 0x00, 0x21, ERRATA_A710_2768515}, [15] = {2742423, 0x00, 0x21, ERRATA_A710_2742423},
[16 ... ERRATA_LIST_END] = UNDEF_ERRATA, [16] = {2768515, 0x00, 0x21, ERRATA_A710_2768515},
[17 ... ERRATA_LIST_END] = UNDEF_ERRATA,
} }
}, },
#endif /* CORTEX_A710_H_INC */ #endif /* CORTEX_A710_H_INC */