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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge "fix(mpam): run-time checks for mpam save/restore routines" into integration
This commit is contained in:
Manish Pandey
TrustedFirmware Code Review
commit
d69a0bf22d
2 changed files with 181 additions and 29 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2022, NVIDIA Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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@ -1063,13 +1063,17 @@
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#define PMBLIMITR_EL1 S3_0_C9_C10_0
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/*******************************************************************************
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* Definitions for system register interface to MPAM
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* Definitions for system register interface, shifts and masks for MPAM
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******************************************************************************/
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#define MPAMIDR_EL1 S3_0_C10_C4_4
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#define MPAM2_EL2 S3_4_C10_C5_0
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#define MPAMHCR_EL2 S3_4_C10_C4_0
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#define MPAM3_EL3 S3_6_C10_C5_0
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#define MPAMIDR_EL1_HAS_HCR_SHIFT ULL(0x11)
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#define MPAMIDR_EL1_VPMR_MAX_SHIFT ULL(0x12)
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#define MPAMIDR_EL1_VPMR_MAX_WIDTH ULL(0x3)
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#define MPAMIDR_EL1_VPMR_MAX_POSSIBLE ULL(0x7)
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/*******************************************************************************
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* Definitions for system register interface to AMU for FEAT_AMUv1
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******************************************************************************/
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -257,52 +257,200 @@ func el2_sysregs_context_save_mpam
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mrs x10, MPAM2_EL2
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str x10, [x0, #CTX_MPAM2_EL2]
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mrs x10, MPAMIDR_EL1
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/*
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* The context registers that we intend to save would be part of the
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* PE's system register frame only if MPAMIDR_EL1.HAS_HCR == 1.
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*/
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tbz w10, #MPAMIDR_EL1_HAS_HCR_SHIFT, 3f
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/*
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* MPAMHCR_EL2, MPAMVPMV_EL2 and MPAMVPM0_EL2 would be present in the
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* system register frame if MPAMIDR_EL1.HAS_HCR == 1. Proceed to save
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* the context of these registers.
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*/
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mrs x11, MPAMHCR_EL2
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mrs x12, MPAMVPM0_EL2
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stp x11, x12, [x0, #CTX_MPAMHCR_EL2]
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mrs x13, MPAMVPM1_EL2
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mrs x14, MPAMVPM2_EL2
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stp x13, x14, [x0, #CTX_MPAMVPM1_EL2]
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mrs x13, MPAMVPMV_EL2
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str x13, [x0, #CTX_MPAMVPMV_EL2]
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mrs x15, MPAMVPM3_EL2
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mrs x16, MPAMVPM4_EL2
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stp x15, x16, [x0, #CTX_MPAMVPM3_EL2]
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/*
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* MPAMIDR_EL1.VPMR_MAX has to be probed to obtain the maximum supported
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* VPMR value. Proceed to save the context of registers from
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* MPAMVPM1_EL2 to MPAMVPM<x>_EL2 where x is VPMR_MAX. From MPAM spec,
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* VPMR_MAX should not be zero if HAS_HCR == 1.
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*/
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ubfx x10, x10, #MPAMIDR_EL1_VPMR_MAX_SHIFT, \
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#MPAMIDR_EL1_VPMR_MAX_WIDTH
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mrs x9, MPAMVPM5_EL2
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mrs x10, MPAMVPM6_EL2
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stp x9, x10, [x0, #CTX_MPAMVPM5_EL2]
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/*
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* Once VPMR_MAX has been identified, calculate the offset relative to
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* PC to jump to so that relevant context can be saved. The offset is
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* calculated as (VPMR_POSSIBLE_MAX - VPMR_MAX) * (instruction size for
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* saving one VPM register) + (absolute address of label "1").
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*/
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mov w11, #MPAMIDR_EL1_VPMR_MAX_POSSIBLE
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sub w10, w11, w10
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mrs x11, MPAMVPM7_EL2
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mrs x12, MPAMVPMV_EL2
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stp x11, x12, [x0, #CTX_MPAMVPM7_EL2]
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ret
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/* Calculate the size of one block of MPAMVPM*_EL2 save */
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adr x11, 1f
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adr x12, 2f
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sub x12, x12, x11
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madd x10, x10, x12, x11
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br x10
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/*
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* The branch above would land properly on one of the blocks following
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* label "1". Make sure that the order of save is retained.
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*/
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1:
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#if ENABLE_BTI
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bti j
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#endif
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mrs x10, MPAMVPM7_EL2
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str x10, [x0, #CTX_MPAMVPM7_EL2]
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2:
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#if ENABLE_BTI
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bti j
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#endif
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mrs x11, MPAMVPM6_EL2
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str x11, [x0, #CTX_MPAMVPM6_EL2]
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#if ENABLE_BTI
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bti j
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#endif
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mrs x12, MPAMVPM5_EL2
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str x12, [x0, #CTX_MPAMVPM5_EL2]
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#if ENABLE_BTI
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bti j
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#endif
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mrs x13, MPAMVPM4_EL2
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str x13, [x0, #CTX_MPAMVPM4_EL2]
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#if ENABLE_BTI
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bti j
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#endif
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mrs x14, MPAMVPM3_EL2
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str x14, [x0, #CTX_MPAMVPM3_EL2]
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#if ENABLE_BTI
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bti j
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#endif
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mrs x15, MPAMVPM2_EL2
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str x15, [x0, #CTX_MPAMVPM2_EL2]
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#if ENABLE_BTI
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bti j
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#endif
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mrs x16, MPAMVPM1_EL2
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str x16, [x0, #CTX_MPAMVPM1_EL2]
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3: ret
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endfunc el2_sysregs_context_save_mpam
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func el2_sysregs_context_restore_mpam
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ldr x10, [x0, #CTX_MPAM2_EL2]
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msr MPAM2_EL2, x10
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mrs x10, MPAMIDR_EL1
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/*
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* The context registers that we intend to restore would be part of the
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* PE's system register frame only if MPAMIDR_EL1.HAS_HCR == 1.
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*/
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tbz w10, #MPAMIDR_EL1_HAS_HCR_SHIFT, 3f
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/*
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* MPAMHCR_EL2, MPAMVPMV_EL2 and MPAMVPM0_EL2 would be present in the
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* system register frame if MPAMIDR_EL1.HAS_HCR == 1. Proceed to restore
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* the context of these registers
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*/
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ldp x11, x12, [x0, #CTX_MPAMHCR_EL2]
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msr MPAMHCR_EL2, x11
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msr MPAMVPM0_EL2, x12
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ldp x13, x14, [x0, #CTX_MPAMVPM1_EL2]
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msr MPAMVPM1_EL2, x13
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msr MPAMVPM2_EL2, x14
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ldr x13, [x0, #CTX_MPAMVPMV_EL2]
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msr MPAMVPMV_EL2, x13
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ldp x15, x16, [x0, #CTX_MPAMVPM3_EL2]
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msr MPAMVPM3_EL2, x15
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msr MPAMVPM4_EL2, x16
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/*
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* MPAMIDR_EL1.VPMR_MAX has to be probed to obtain the maximum supported
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* VPMR value. Proceed to restore the context of registers from
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* MPAMVPM1_EL2 to MPAMVPM<x>_EL2 where x is VPMR_MAX. from MPAM spec,
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* VPMR_MAX should not be zero if HAS_HCR == 1.
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*/
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ubfx x10, x10, #MPAMIDR_EL1_VPMR_MAX_SHIFT, \
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#MPAMIDR_EL1_VPMR_MAX_WIDTH
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ldp x9, x10, [x0, #CTX_MPAMVPM5_EL2]
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msr MPAMVPM5_EL2, x9
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msr MPAMVPM6_EL2, x10
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/*
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* Once VPMR_MAX has been identified, calculate the offset relative to
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* PC to jump to so that relevant context can be restored. The offset is
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* calculated as (VPMR_POSSIBLE_MAX - VPMR_MAX) * (instruction size for
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* restoring one VPM register) + (absolute address of label "1").
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*/
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mov w11, #MPAMIDR_EL1_VPMR_MAX_POSSIBLE
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sub w10, w11, w10
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ldp x11, x12, [x0, #CTX_MPAMVPM7_EL2]
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msr MPAMVPM7_EL2, x11
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msr MPAMVPMV_EL2, x12
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ret
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/* Calculate the size of one block of MPAMVPM*_EL2 restore */
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adr x11, 1f
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adr x12, 2f
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sub x12, x12, x11
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madd x10, x10, x12, x11
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br x10
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/*
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* The branch above would land properly on one of the blocks following
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* label "1". Make sure that the order of restore is retained.
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*/
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1:
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#if ENABLE_BTI
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bti j
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#endif
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ldr x10, [x0, #CTX_MPAMVPM7_EL2]
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msr MPAMVPM7_EL2, x10
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2:
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#if ENABLE_BTI
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bti j
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#endif
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ldr x11, [x0, #CTX_MPAMVPM6_EL2]
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msr MPAMVPM6_EL2, x11
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#if ENABLE_BTI
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bti j
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#endif
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ldr x12, [x0, #CTX_MPAMVPM5_EL2]
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msr MPAMVPM5_EL2, x12
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#if ENABLE_BTI
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bti j
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#endif
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ldr x13, [x0, #CTX_MPAMVPM4_EL2]
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msr MPAMVPM4_EL2, x13
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#if ENABLE_BTI
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bti j
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#endif
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ldr x14, [x0, #CTX_MPAMVPM3_EL2]
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msr MPAMVPM3_EL2, x14
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#if ENABLE_BTI
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bti j
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#endif
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ldr x15, [x0, #CTX_MPAMVPM2_EL2]
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msr MPAMVPM2_EL2, x15
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#if ENABLE_BTI
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bti j
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#endif
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ldr x16, [x0, #CTX_MPAMVPM1_EL2]
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msr MPAMVPM1_EL2, x16
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3: ret
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endfunc el2_sysregs_context_restore_mpam
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#endif /* ENABLE_MPAM_FOR_LOWER_ELS */
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