From d594239d4ebf2d44521bc30ec4b59b23f08c5a36 Mon Sep 17 00:00:00 2001 From: Lionel Debieve Date: Wed, 23 Feb 2022 00:05:51 +0100 Subject: [PATCH] feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit LSI was too slow to provide enough random numbers (limited to 6ms for 16 bytes production). Switch to CSI that allow to get the RNG fifo ready in less than 50µs. Signed-off-by: Lionel Debieve Change-Id: I76d1fe58e2f4d5416a96f48123ae36bd82d8a8ee --- fdts/stm32mp151a-prtt1a.dts | 3 ++- fdts/stm32mp157a-avenger96.dts | 2 +- fdts/stm32mp157c-ed1.dts | 2 +- fdts/stm32mp157c-odyssey-som.dtsi | 2 +- fdts/stm32mp15xx-dhcom-som.dtsi | 2 +- fdts/stm32mp15xx-dhcor-som.dtsi | 4 ++-- fdts/stm32mp15xx-dkx.dtsi | 2 +- fdts/stm32mp15xx-osd32.dtsi | 2 +- 8 files changed, 10 insertions(+), 9 deletions(-) diff --git a/fdts/stm32mp151a-prtt1a.dts b/fdts/stm32mp151a-prtt1a.dts index 363462081..9742dcb63 100644 --- a/fdts/stm32mp151a-prtt1a.dts +++ b/fdts/stm32mp151a-prtt1a.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * Copyright (C) 2023, Protonic Holland - All Rights Reserved + * Copyright (C) 2024, STMicroelectronics - All Rights Reserved * Author: David Jander */ /dts-v1/; @@ -123,7 +124,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp157a-avenger96.dts b/fdts/stm32mp157a-avenger96.dts index f0da350bb..ac8b1629e 100644 --- a/fdts/stm32mp157a-avenger96.dts +++ b/fdts/stm32mp157a-avenger96.dts @@ -228,7 +228,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts index d7bcc844c..f5cc93609 100644 --- a/fdts/stm32mp157c-ed1.dts +++ b/fdts/stm32mp157c-ed1.dts @@ -247,7 +247,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp157c-odyssey-som.dtsi b/fdts/stm32mp157c-odyssey-som.dtsi index a0be7183c..ad514a14e 100644 --- a/fdts/stm32mp157c-odyssey-som.dtsi +++ b/fdts/stm32mp157c-odyssey-som.dtsi @@ -260,7 +260,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp15xx-dhcom-som.dtsi b/fdts/stm32mp15xx-dhcom-som.dtsi index 513886874..73d33f1ac 100644 --- a/fdts/stm32mp15xx-dhcom-som.dtsi +++ b/fdts/stm32mp15xx-dhcom-som.dtsi @@ -246,7 +246,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp15xx-dhcor-som.dtsi b/fdts/stm32mp15xx-dhcor-som.dtsi index 8d829a416..882f336f0 100644 --- a/fdts/stm32mp15xx-dhcor-som.dtsi +++ b/fdts/stm32mp15xx-dhcor-som.dtsi @@ -4,7 +4,7 @@ * Author: Manivannan Sadhasivam * Copyright (C) 2020 Marek Vasut * Copyright (C) 2022 DH electronics GmbH - * Copyright (C) 2023, STMicroelectronics - All Rights Reserved + * Copyright (C) 2023-2024, STMicroelectronics - All Rights Reserved */ #include "stm32mp15-pinctrl.dtsi" @@ -241,7 +241,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp15xx-dkx.dtsi b/fdts/stm32mp15xx-dkx.dtsi index d8b7c484c..c37517418 100644 --- a/fdts/stm32mp15xx-dkx.dtsi +++ b/fdts/stm32mp15xx-dkx.dtsi @@ -251,7 +251,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 diff --git a/fdts/stm32mp15xx-osd32.dtsi b/fdts/stm32mp15xx-osd32.dtsi index ef4c3c0e2..ee90ba219 100644 --- a/fdts/stm32mp15xx-osd32.dtsi +++ b/fdts/stm32mp15xx-osd32.dtsi @@ -238,7 +238,7 @@ CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q - CLK_RNG1_LSI + CLK_RNG1_CSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3