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refactor(tc): move DTB to start of DRAM

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Now that tf-a passes the DTB address to BL33, its location doesn't
matter. Since we declare a fixed size for it (32K) put it at the start
of ram to not fragment memory. This has the added benefit of
"supporting" larger kernel sizes which are breaking with the current
location.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ib0e4e5cf780bd58a49a34d72085b0a0914c340ed
This commit is contained in:
Boyan Karatotev 2023-09-28 13:31:51 +00:00
parent 6dacc272b0
commit d585aa162e
2 changed files with 10 additions and 4 deletions
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7
plat/arm/board/tc/fdts/tc_fw_config.dts
View file

@ -1,10 +1,11 @@
/*
* Copyright (c) 2020-2021, Arm Limited. All rights reserved.
* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/tbbr/tbbr_img_def.h>
#include <platform_def.h>
/dts-v1/;
@ -25,8 +26,8 @@
};
hw-config {
load-address = <0x0 0x83000000>;
max-size = <0x8000>;
load-address = <0x0 PLAT_HW_CONFIG_DTB_BASE>;
max-size = <PLAT_HW_CONFIG_DTB_SIZE>;
id = <HW_CONFIG_ID>;
};
};

7
plat/arm/board/tc/include/platform_def.h
View file

@ -28,6 +28,11 @@
* - Region to load secure partitions
*
*
* 0x8000_0000 ------------------ TC_NS_DRAM1_BASE
* | DTB |
* | (32K) |
* 0x8000_8000 ------------------
* | ... |
* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
* | FWU shmem |
* | (4MB) |
@ -79,7 +84,7 @@
TC_TZC_DRAM1_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
#define PLAT_HW_CONFIG_DTB_BASE ULL(0x83000000)
#define PLAT_HW_CONFIG_DTB_BASE TC_NS_DRAM1_BASE
#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \