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refactor(tc): move DTB to start of DRAM
Now that tf-a passes the DTB address to BL33, its location doesn't matter. Since we declare a fixed size for it (32K) put it at the start of ram to not fragment memory. This has the added benefit of "supporting" larger kernel sizes which are breaking with the current location. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ib0e4e5cf780bd58a49a34d72085b0a0914c340ed
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2 changed files with 10 additions and 4 deletions
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@ -1,10 +1,11 @@
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/*
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/*
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* Copyright (c) 2020-2021, Arm Limited. All rights reserved.
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* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#include <common/tbbr/tbbr_img_def.h>
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#include <common/tbbr/tbbr_img_def.h>
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#include <platform_def.h>
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/dts-v1/;
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/dts-v1/;
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@ -25,8 +26,8 @@
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};
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};
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hw-config {
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hw-config {
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load-address = <0x0 0x83000000>;
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load-address = <0x0 PLAT_HW_CONFIG_DTB_BASE>;
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max-size = <0x8000>;
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max-size = <PLAT_HW_CONFIG_DTB_SIZE>;
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id = <HW_CONFIG_ID>;
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id = <HW_CONFIG_ID>;
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};
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};
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};
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};
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@ -28,6 +28,11 @@
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* - Region to load secure partitions
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* - Region to load secure partitions
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*
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*
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*
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*
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* 0x8000_0000 ------------------ TC_NS_DRAM1_BASE
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* | DTB |
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* | (32K) |
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* 0x8000_8000 ------------------
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* | ... |
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* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
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* 0xf8a0_0000 ------------------ TC_NS_FWU_BASE
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* | FWU shmem |
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* | FWU shmem |
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* | (4MB) |
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* | (4MB) |
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@ -79,7 +84,7 @@
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TC_TZC_DRAM1_SIZE, \
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TC_TZC_DRAM1_SIZE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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MT_MEMORY | MT_RW | MT_SECURE)
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#define PLAT_HW_CONFIG_DTB_BASE ULL(0x83000000)
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#define PLAT_HW_CONFIG_DTB_BASE TC_NS_DRAM1_BASE
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#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
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#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x8000)
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#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \
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#define PLAT_DTB_DRAM_NS MAP_REGION_FLAT( \
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