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mem_protect: Add mem_protect API
This patch adds the generic code that links the psci smc handler with the platform function that implements the mem_protect and mem_check_range functionalities. These functions are optional APIs added in PSCI v1.1 (ARM DEN022D). Change-Id: I3bac1307a5ce2c7a196ace76db8317e8d8c8bb3f Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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6 changed files with 63 additions and 0 deletions
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@ -65,6 +65,9 @@
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#define PSCI_STAT_RESIDENCY_AARCH64 U(0xc4000010)
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#define PSCI_STAT_RESIDENCY_AARCH64 U(0xc4000010)
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#define PSCI_STAT_COUNT_AARCH32 U(0x84000011)
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#define PSCI_STAT_COUNT_AARCH32 U(0x84000011)
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#define PSCI_STAT_COUNT_AARCH64 U(0xc4000011)
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#define PSCI_STAT_COUNT_AARCH64 U(0xc4000011)
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#define PSCI_MEM_PROTECT U(0x84000013)
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#define PSCI_MEM_CHK_RANGE_AARCH32 U(0x84000014)
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#define PSCI_MEM_CHK_RANGE_AARCH64 U(0xc4000014)
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/* Macro to help build the psci capabilities bitfield */
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/* Macro to help build the psci capabilities bitfield */
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#define define_psci_cap(x) (U(1) << (x & U(0x1f)))
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#define define_psci_cap(x) (U(1) << (x & U(0x1f)))
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@ -288,6 +291,9 @@ typedef struct plat_psci_ops {
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unsigned int power_state,
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unsigned int power_state,
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psci_power_state_t *output_state);
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psci_power_state_t *output_state);
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int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
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int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
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int (*mem_protect_chk)(uintptr_t base, u_register_t length);
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int (*read_mem_protect)(int *val);
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int (*write_mem_protect)(int val);
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} plat_psci_ops_t;
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} plat_psci_ops_t;
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/*******************************************************************************
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/*******************************************************************************
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@ -17,6 +17,7 @@ PSCI_LIB_SOURCES := lib/el3_runtime/cpu_data_array.c \
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lib/psci/psci_main.c \
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lib/psci/psci_main.c \
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lib/psci/psci_setup.c \
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lib/psci/psci_setup.c \
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lib/psci/psci_system_off.c \
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lib/psci/psci_system_off.c \
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lib/psci/psci_mem_protect.c \
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lib/psci/${ARCH}/psci_helpers.S
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lib/psci/${ARCH}/psci_helpers.S
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ifeq (${ARCH}, aarch64)
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ifeq (${ARCH}, aarch64)
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@ -408,6 +408,11 @@ u_register_t psci_smc_handler(uint32_t smc_fid,
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case PSCI_STAT_COUNT_AARCH32:
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case PSCI_STAT_COUNT_AARCH32:
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return psci_stat_count(x1, x2);
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return psci_stat_count(x1, x2);
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#endif
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#endif
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case PSCI_MEM_PROTECT:
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return psci_mem_protect(x1);
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case PSCI_MEM_CHK_RANGE_AARCH32:
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return psci_mem_chk_range(x1, x2);
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default:
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default:
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break;
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break;
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@ -445,6 +450,10 @@ u_register_t psci_smc_handler(uint32_t smc_fid,
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return psci_stat_count(x1, x2);
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return psci_stat_count(x1, x2);
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#endif
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#endif
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case PSCI_MEM_CHK_RANGE_AARCH64:
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return psci_mem_chk_range(x1, x2);
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default:
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default:
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break;
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break;
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}
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}
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38
lib/psci/psci_mem_protect.c
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38
lib/psci/psci_mem_protect.c
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@ -0,0 +1,38 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <limits.h>
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#include <utils.h>
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#include "psci_private.h"
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int psci_mem_protect(unsigned int enable)
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{
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int val;
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assert(psci_plat_pm_ops->read_mem_protect);
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assert(psci_plat_pm_ops->write_mem_protect);
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if (psci_plat_pm_ops->read_mem_protect(&val) < 0)
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return PSCI_E_NOT_SUPPORTED;
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if (psci_plat_pm_ops->write_mem_protect(enable) < 0)
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return PSCI_E_NOT_SUPPORTED;
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return val != 0;
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}
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int psci_mem_chk_range(uintptr_t base, u_register_t length)
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{
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int ret;
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assert(psci_plat_pm_ops->mem_protect_chk);
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if (length == 0 || check_uptr_overflow(base, length-1))
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return PSCI_E_DENIED;
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ret = psci_plat_pm_ops->mem_protect_chk(base, length);
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return (ret < 0) ? PSCI_E_DENIED : PSCI_E_SUCCESS;
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}
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@ -269,4 +269,8 @@ u_register_t psci_stat_residency(u_register_t target_cpu,
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u_register_t psci_stat_count(u_register_t target_cpu,
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u_register_t psci_stat_count(u_register_t target_cpu,
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unsigned int power_state);
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unsigned int power_state);
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/* Private exported functions from psci_mem_protect.c */
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int psci_mem_protect(unsigned int enable);
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int psci_mem_chk_range(uintptr_t base, u_register_t length);
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#endif /* __PSCI_PRIVATE_H__ */
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#endif /* __PSCI_PRIVATE_H__ */
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@ -243,6 +243,11 @@ int psci_setup(const psci_lib_args_t *lib_args)
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psci_caps |= define_psci_cap(PSCI_SYSTEM_RESET);
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psci_caps |= define_psci_cap(PSCI_SYSTEM_RESET);
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if (psci_plat_pm_ops->get_node_hw_state)
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if (psci_plat_pm_ops->get_node_hw_state)
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psci_caps |= define_psci_cap(PSCI_NODE_HW_STATE_AARCH64);
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psci_caps |= define_psci_cap(PSCI_NODE_HW_STATE_AARCH64);
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if (psci_plat_pm_ops->read_mem_protect &&
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psci_plat_pm_ops->write_mem_protect)
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psci_caps |= define_psci_cap(PSCI_MEM_PROTECT);
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if (psci_plat_pm_ops->mem_protect_chk)
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psci_caps |= define_psci_cap(PSCI_MEM_CHK_RANGE_AARCH64);
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#if ENABLE_PSCI_STAT
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#if ENABLE_PSCI_STAT
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psci_caps |= define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64);
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psci_caps |= define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64);
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