Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-24 22:05:40 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

refactor(cm): minor update on conditions used in prepare_el3_exit

Browse source 
This patch covers the following:

* Conditions set for verifying the EL2 presence and its usage
  for various scenarios while exiting to Non secure world
  "cm_prepare_el3_exit" has been improved.

* It thereby also fixes the issue(misra_c_2012_rule_15_7_violation)
  for not terminating "if..else if" construct with an else statement
  and keeps code in accordance with MISRA standards.

Change-Id: Ie5284447f5ac91412552629b76dbf2e636a09fd9
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
This commit is contained in:
Jayanth Dodderi Chidanand 2024-03-06 13:31:35 +00:00
parent d53fff38ca
commit d39b123690
1 changed files with 24 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

44
lib/el3_runtime/aarch64/context_mgmt.c
View file

@ -959,8 +959,8 @@ void cm_prepare_el3_exit(uint32_t security_state)
scr_el3 = read_ctx_reg(get_el3state_ctx(ctx),
CTX_SCR_EL3);
if (((scr_el3 & SCR_HCE_BIT) != 0U)
|| (el2_implemented != EL_IMPL_NONE)) {
if (el2_implemented != EL_IMPL_NONE) {
/*
* If context is not being used for EL2, initialize
* HCRX_EL2 with its init value here.
@ -986,28 +986,32 @@ void cm_prepare_el3_exit(uint32_t security_state)
write_hfgrtr_el2(HFGRTR_EL2_INIT_VAL);
write_hfgwtr_el2(HFGWTR_EL2_INIT_VAL);
}
}
if ((scr_el3 & SCR_HCE_BIT) != 0U) {
/* Use SCTLR_EL1.EE value to initialise sctlr_el2 */
sctlr_elx = read_ctx_reg(get_el1_sysregs_ctx(ctx),
CTX_SCTLR_EL1);
sctlr_elx &= SCTLR_EE_BIT;
sctlr_elx |= SCTLR_EL2_RES1;
/* Condition to ensure EL2 is being used. */
if ((scr_el3 & SCR_HCE_BIT) != 0U) {
/* Use SCTLR_EL1.EE value to initialise sctlr_el2 */
sctlr_elx = read_ctx_reg(get_el1_sysregs_ctx(ctx),
CTX_SCTLR_EL1);
sctlr_elx &= SCTLR_EE_BIT;
sctlr_elx |= SCTLR_EL2_RES1;
#if ERRATA_A75_764081
/*
* If workaround of errata 764081 for Cortex-A75 is used
* then set SCTLR_EL2.IESB to enable Implicit Error
* Synchronization Barrier.
*/
sctlr_elx |= SCTLR_IESB_BIT;
#endif
write_sctlr_el2(sctlr_elx);
} else if (el2_implemented != EL_IMPL_NONE) {
init_nonsecure_el2_unused(ctx);
/*
* If workaround of errata 764081 for Cortex-A75
* is used then set SCTLR_EL2.IESB to enable
* Implicit Error Synchronization Barrier.
*/
sctlr_elx |= SCTLR_IESB_BIT;
#endif /* ERRATA_A75_764081 */
write_sctlr_el2(sctlr_elx);
} else {
/*
* (scr_el3 & SCR_HCE_BIT==0)
* EL2 implemented but unused.
*/
init_nonsecure_el2_unused(ctx);
}
}
}
cm_el1_sysregs_context_restore(security_state);
cm_set_next_eret_context(security_state);
}