Merge changes from topic "lto-fixes" into integration

* changes:
  fix(bl1): add missing `__RW_{START,END}__` symbols
  fix(fvp): don't check MPIDRs with the power controller in BL1
  fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
  fix(cm): hide `cm_init_context_by_index` from BL1
  fix(bl1): add missing spinlock dependency
This commit is contained in:
Manish Pandey 2024-04-16 15:51:44 +02:00 committed by TrustedFirmware Code Review
commit d3604b353e
9 changed files with 30 additions and 9 deletions

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -116,6 +116,8 @@ SECTIONS {
ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE), ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE),
"BL1_RW_BASE address is not aligned on a page boundary.") "BL1_RW_BASE address is not aligned on a page boundary.")
__RW_START__ = .;
DATA_SECTION >RAM AT>ROM DATA_SECTION >RAM AT>ROM
__DATA_RAM_START__ = __DATA_START__; __DATA_RAM_START__ = __DATA_START__;
@ -148,6 +150,8 @@ SECTIONS {
} >RAM } >RAM
#endif /* USE_COHERENT_MEM */ #endif /* USE_COHERENT_MEM */
__RW_END__ = .;
__BL1_RAM_START__ = ADDR(.data); __BL1_RAM_START__ = ADDR(.data);
__BL1_RAM_END__ = .; __BL1_RAM_END__ = .;

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@ -12,6 +12,7 @@ BL1_SOURCES += bl1/${ARCH}/bl1_arch_setup.c \
lib/cpus/${ARCH}/cpu_helpers.S \ lib/cpus/${ARCH}/cpu_helpers.S \
lib/cpus/errata_report.c \ lib/cpus/errata_report.c \
lib/el3_runtime/${ARCH}/context_mgmt.c \ lib/el3_runtime/${ARCH}/context_mgmt.c \
lib/locks/exclusive/${ARCH}/spinlock.S \
plat/common/plat_bl1_common.c \ plat/common/plat_bl1_common.c \
plat/common/${ARCH}/platform_up_stack.S \ plat/common/${ARCH}/platform_up_stack.S \
${MBEDTLS_SOURCES} ${MBEDTLS_SOURCES}

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -30,12 +30,15 @@ void cm_set_context_by_index(unsigned int cpu_idx,
void *cm_get_context(uint32_t security_state); void *cm_get_context(uint32_t security_state);
void cm_set_context(void *context, uint32_t security_state); void cm_set_context(void *context, uint32_t security_state);
void cm_init_my_context(const struct entry_point_info *ep); void cm_init_my_context(const struct entry_point_info *ep);
void cm_init_context_by_index(unsigned int cpu_idx,
const struct entry_point_info *ep);
void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep); void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep);
void cm_prepare_el3_exit(uint32_t security_state); void cm_prepare_el3_exit(uint32_t security_state);
void cm_prepare_el3_exit_ns(void); void cm_prepare_el3_exit_ns(void);
#if !IMAGE_BL1
void cm_init_context_by_index(unsigned int cpu_idx,
const struct entry_point_info *ep);
#endif /* !IMAGE_BL1 */
#ifdef __aarch64__ #ifdef __aarch64__
#if IMAGE_BL31 #if IMAGE_BL31
void cm_manage_extensions_el3(void); void cm_manage_extensions_el3(void);

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@ -285,10 +285,14 @@ void arm_sp_min_plat_arch_setup(void);
bool arm_io_is_toc_valid(void); bool arm_io_is_toc_valid(void);
/* Utility functions for Dynamic Config */ /* Utility functions for Dynamic Config */
void arm_bl2_dyn_cfg_init(void);
void arm_bl1_set_mbedtls_heap(void); void arm_bl1_set_mbedtls_heap(void);
int arm_get_mbedtls_heap(void **heap_addr, size_t *heap_size); int arm_get_mbedtls_heap(void **heap_addr, size_t *heap_size);
#if IMAGE_BL2
void arm_bl2_dyn_cfg_init(void);
#endif /* IMAGE_BL2 */
#if MEASURED_BOOT #if MEASURED_BOOT
#if DICE_PROTECTION_ENVIRONMENT #if DICE_PROTECTION_ENVIRONMENT
int arm_set_nt_fw_info(int *ctx_handle); int arm_set_nt_fw_info(int *ctx_handle);

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -157,6 +157,7 @@ static void enable_extensions_nonsecure(bool el2_unused)
#endif /* IMAGE_BL32 */ #endif /* IMAGE_BL32 */
} }
#if !IMAGE_BL1
/******************************************************************************* /*******************************************************************************
* The following function initializes the cpu_context for a CPU specified by * The following function initializes the cpu_context for a CPU specified by
* its `cpu_idx` for first use, and sets the initial entrypoint state as * its `cpu_idx` for first use, and sets the initial entrypoint state as
@ -169,6 +170,7 @@ void cm_init_context_by_index(unsigned int cpu_idx,
ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr)); ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr));
cm_setup_context(ctx, ep); cm_setup_context(ctx, ep);
} }
#endif /* !IMAGE_BL1 */
/******************************************************************************* /*******************************************************************************
* The following function initializes the cpu_context for the current CPU * The following function initializes the cpu_context for the current CPU

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@ -809,6 +809,7 @@ static void manage_extensions_secure(cpu_context_t *ctx)
#endif /* IMAGE_BL31 */ #endif /* IMAGE_BL31 */
} }
#if !IMAGE_BL1
/******************************************************************************* /*******************************************************************************
* The following function initializes the cpu_context for a CPU specified by * The following function initializes the cpu_context for a CPU specified by
* its `cpu_idx` for first use, and sets the initial entrypoint state as * its `cpu_idx` for first use, and sets the initial entrypoint state as
@ -821,6 +822,7 @@ void cm_init_context_by_index(unsigned int cpu_idx,
ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr)); ctx = cm_get_context_by_index(cpu_idx, GET_SECURITY_STATE(ep->h.attr));
cm_setup_context(ctx, ep); cm_setup_context(ctx, ep);
} }
#endif /* !IMAGE_BL1 */
/******************************************************************************* /*******************************************************************************
* The following function initializes the cpu_context for the current CPU * The following function initializes the cpu_context for the current CPU

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -36,7 +36,7 @@ const unsigned char *plat_get_power_domain_tree_desc(void)
* fconf APIs are not supported for RESET_TO_SP_MIN, RESET_TO_BL31 and * fconf APIs are not supported for RESET_TO_SP_MIN, RESET_TO_BL31 and
* RESET_TO_BL2 systems. * RESET_TO_BL2 systems.
*/ */
#if RESET_TO_SP_MIN || RESET_TO_BL31 || RESET_TO_BL2 #if RESET_TO_SP_MIN || RESET_TO_BL31 || RESET_TO_BL2 || IMAGE_BL1
cluster_count = FVP_CLUSTER_COUNT; cluster_count = FVP_CLUSTER_COUNT;
cpus_per_cluster = FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU; cpus_per_cluster = FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU;
#else #else
@ -106,8 +106,10 @@ int plat_core_pos_by_mpidr(u_register_t mpidr)
if (thread_id >= FVP_MAX_PE_PER_CPU) if (thread_id >= FVP_MAX_PE_PER_CPU)
return -1; return -1;
#if !IMAGE_BL1
if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID) if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
return -1; return -1;
#endif /* IMAGE_BL1 */
/* /*
* Core position calculation for FVP platform depends on the MT bit in * Core position calculation for FVP platform depends on the MT bit in

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@ -237,6 +237,7 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
plat/arm/board/fvp/fvp_bl1_setup.c \ plat/arm/board/fvp/fvp_bl1_setup.c \
plat/arm/board/fvp/fvp_err.c \ plat/arm/board/fvp/fvp_err.c \
plat/arm/board/fvp/fvp_io_storage.c \ plat/arm/board/fvp/fvp_io_storage.c \
plat/arm/board/fvp/fvp_topology.c \
${FVP_CPU_LIBS} \ ${FVP_CPU_LIBS} \
${FVP_INTERCONNECT_SOURCES} ${FVP_INTERCONNECT_SOURCES}

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -120,6 +120,7 @@ void arm_bl1_set_mbedtls_heap(void)
} }
#endif /* CRYPTO_SUPPORT */ #endif /* CRYPTO_SUPPORT */
#if IMAGE_BL2
/* /*
* BL2 utility function to initialize dynamic configuration specified by * BL2 utility function to initialize dynamic configuration specified by
* FW_CONFIG. Populate the bl_mem_params_node_t of other FW_CONFIGs if * FW_CONFIG. Populate the bl_mem_params_node_t of other FW_CONFIGs if
@ -229,3 +230,4 @@ void arm_bl2_dyn_cfg_init(void)
panic(); panic();
} }
} }
#endif /* IMAGE_BL2 */