From d23acc9e4f94d95280ee7985e3f96482eb7fe04d Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 21 Mar 2023 13:53:19 +0000 Subject: [PATCH] refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1 So far we have the ENABLE_AMU build option to include AMU register handling code for enabling and context switch. There is also an ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system register handling. The latter needs some alignment with the new feature scheme, but it conceptually overlaps with the ENABLE_AMU option. Since there is no real need for two separate options, unify both into a new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at this point, a subsequent patch will make use of the new feature handling scheme. Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e Signed-off-by: Andre Przywara --- Makefile | 6 ++---- bl31/bl31.mk | 2 +- bl32/sp_min/sp_min.mk | 2 +- common/feat_detect.c | 2 +- docs/components/activity-monitors.rst | 6 +++--- docs/getting_started/build-options.rst | 18 ++++++------------ include/arch/aarch64/arch_features.h | 4 ++-- lib/cpus/aarch64/cortex_a75.S | 2 +- lib/cpus/aarch64/cortex_a78.S | 2 +- lib/cpus/aarch64/cortex_a78_ae.S | 2 +- lib/cpus/aarch64/neoverse_n1.S | 2 +- lib/cpus/aarch64/neoverse_n2.S | 2 +- lib/cpus/aarch64/rainier.S | 2 +- lib/el3_runtime/aarch32/context_mgmt.c | 2 +- lib/el3_runtime/aarch64/context_mgmt.c | 2 +- lib/extensions/amu/amu.mk | 4 ++-- make_helpers/defaults.mk | 5 +---- plat/arm/board/arm_fpga/platform.mk | 2 +- plat/arm/board/fvp/platform.mk | 4 ++-- plat/arm/board/fvp_r/platform.mk | 2 +- plat/arm/board/rdn2/platform.mk | 2 +- plat/arm/board/rdv1/platform.mk | 2 +- plat/arm/board/rdv1mc/platform.mk | 2 +- plat/arm/board/tc/platform.mk | 2 +- plat/mediatek/common/common_config.mk | 2 +- plat/qti/msm8916/platform.mk | 1 - 26 files changed, 36 insertions(+), 48 deletions(-) diff --git a/Makefile b/Makefile index ca97fc2f2..cc2ac6faa 100644 --- a/Makefile +++ b/Makefile @@ -1092,7 +1092,6 @@ $(eval $(call assert_booleans,\ DISABLE_MTPMU \ DYN_DISABLE_AUTH \ EL3_EXCEPTION_HANDLING \ - ENABLE_AMU \ ENABLE_AMU_AUXILIARY_COUNTERS \ ENABLE_AMU_FCONF \ AMU_RESTRICT_COUNTERS \ @@ -1172,7 +1171,7 @@ $(eval $(call assert_numerics,\ ENABLE_TRBE_FOR_NS \ ENABLE_BTI \ ENABLE_PAUTH \ - ENABLE_FEAT_AMUv1 \ + ENABLE_FEAT_AMU \ ENABLE_FEAT_AMUv1p1 \ ENABLE_FEAT_CSV2_2 \ ENABLE_FEAT_DIT \ @@ -1229,7 +1228,7 @@ $(eval $(call add_defines,\ CTX_INCLUDE_NEVE_REGS \ DECRYPTION_SUPPORT_${DECRYPTION_SUPPORT} \ DISABLE_MTPMU \ - ENABLE_AMU \ + ENABLE_FEAT_AMU \ ENABLE_AMU_AUXILIARY_COUNTERS \ ENABLE_AMU_FCONF \ AMU_RESTRICT_COUNTERS \ @@ -1310,7 +1309,6 @@ $(eval $(call add_defines,\ ENABLE_MPMM \ ENABLE_MPMM_FCONF \ ENABLE_FEAT_FGT \ - ENABLE_FEAT_AMUv1 \ ENABLE_FEAT_ECV \ SIMICS_BUILD \ ENABLE_FEAT_AMUv1p1 \ diff --git a/bl31/bl31.mk b/bl31/bl31.mk index 006843efd..bf907eaa5 100644 --- a/bl31/bl31.mk +++ b/bl31/bl31.mk @@ -91,7 +91,7 @@ ifneq (${ENABLE_SPE_FOR_NS},0) BL31_SOURCES += lib/extensions/spe/spe.c endif -ifeq (${ENABLE_AMU},1) +ifneq (${ENABLE_FEAT_AMU},0) BL31_SOURCES += ${AMU_SOURCES} endif diff --git a/bl32/sp_min/sp_min.mk b/bl32/sp_min/sp_min.mk index e85e2738c..0e5c1420c 100644 --- a/bl32/sp_min/sp_min.mk +++ b/bl32/sp_min/sp_min.mk @@ -28,7 +28,7 @@ ifeq (${ENABLE_PMF}, 1) BL32_SOURCES += lib/pmf/pmf_main.c endif -ifeq (${ENABLE_AMU},1) +ifneq (${ENABLE_FEAT_AMU},0) BL32_SOURCES += ${AMU_SOURCES} endif diff --git a/common/feat_detect.c b/common/feat_detect.c index 9218c07e1..ba8c82c2c 100644 --- a/common/feat_detect.c +++ b/common/feat_detect.c @@ -187,7 +187,7 @@ void detect_arch_features(void) /* v8.4 features */ read_feat_dit(); - check_feature(ENABLE_FEAT_AMUv1, read_feat_amu_id_field(), + check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(), "AMUv1", 1, 2); check_feature(ENABLE_MPAM_FOR_LOWER_ELS, read_feat_mpam_version(), "MPAM", 1, 17); diff --git a/docs/components/activity-monitors.rst b/docs/components/activity-monitors.rst index dd45c4353..5c1c2c2c7 100644 --- a/docs/components/activity-monitors.rst +++ b/docs/components/activity-monitors.rst @@ -6,9 +6,9 @@ extension. This extension describes the architecture for the Activity Monitor Unit (|AMU|), an optional non-invasive component for monitoring core events through a set of 64-bit counters. -When the ``ENABLE_AMU=1`` build option is provided, Trusted Firmware-A sets up -the |AMU| prior to its exit from EL3, and will save and restore architected -|AMU| counters as necessary upon suspend and resume. +When the ``ENABLE_FEAT_AMU=1`` build option is provided, Trusted Firmware-A +sets up the |AMU| prior to its exit from EL3, and will save and restore +architected |AMU| counters as necessary upon suspend and resume. .. _Activity Monitor Auxiliary Counters: diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst index 0540b6d2f..08c1ff68e 100644 --- a/docs/getting_started/build-options.rst +++ b/docs/getting_started/build-options.rst @@ -230,11 +230,6 @@ Common build options payload. Please refer to the "Booting an EL3 payload" section for more details. -- ``ENABLE_AMU``: Boolean option to enable Activity Monitor Unit extensions. - This is an optional architectural feature available on v8.4 onwards. Some - v8.2 implementations also implement an AMU and this option can be used to - enable this feature on those systems as well. Default is 0. - - ``ENABLE_AMU_AUXILIARY_COUNTERS``: Enables support for AMU auxiliary counters (also known as group 1 counters). These are implementation-defined counters, and as such require additional platform configuration. Default is 0. @@ -261,13 +256,12 @@ Common build options builds, but this behaviour can be overridden in each platform's Makefile or in the build command line. -- ``ENABLE_FEAT_AMUv1``: Numeric value to enable access to the HAFGRTR_EL2 - (Hypervisor Activity Monitors Fine-Grained Read Trap Register) during EL2 - to EL3 context save/restore operations. This flag can take the values 0 to 2, - to align with the ``FEATURE_DETECTION`` mechanism. It is an optional feature - available on v8.4 and onwards and must be set to either 1 or 2 alongside - ``ENABLE_FEAT_FGT``, to access the HAFGRTR_EL2 register. - Default value is ``0``. +- ``ENABLE_FEAT_AMU``: Numeric value to enable Activity Monitor Unit + extensions. This flag can take the values 0 to 2, to align with the + ``FEATURE_DETECTION`` mechanism. This is an optional architectural feature + available on v8.4 onwards. Some v8.2 implementations also implement an AMU + and this option can be used to enable this feature on those systems as well. + This flag can take the values 0 to 2, the default is 0. - ``ENABLE_FEAT_AMUv1p1``: Numeric value to enable the ``FEAT_AMUv1p1`` extension. ``FEAT_AMUv1p1`` is an optional feature available on Arm v8.6 diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h index d3c626367..f82789597 100644 --- a/include/arch/aarch64/arch_features.h +++ b/include/arch/aarch64/arch_features.h @@ -244,11 +244,11 @@ static unsigned int read_feat_amu_id_field(void) static inline bool is_feat_amu_supported(void) { - if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) { + if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) { return false; } - if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) { + if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) { return true; } diff --git a/lib/cpus/aarch64/cortex_a75.S b/lib/cpus/aarch64/cortex_a75.S index d561be45e..e22c82898 100644 --- a/lib/cpus/aarch64/cortex_a75.S +++ b/lib/cpus/aarch64/cortex_a75.S @@ -121,7 +121,7 @@ func cortex_a75_reset_func bl errata_dsu_936184_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 orr x0, x0, #CORTEX_A75_ACTLR_AMEN_BIT diff --git a/lib/cpus/aarch64/cortex_a78.S b/lib/cpus/aarch64/cortex_a78.S index 421509d73..69d7ab04f 100644 --- a/lib/cpus/aarch64/cortex_a78.S +++ b/lib/cpus/aarch64/cortex_a78.S @@ -483,7 +483,7 @@ func cortex_a78_reset_func bl errata_a78_2779479_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 bic x0, x0, #CORTEX_A78_ACTLR_TAM_BIT diff --git a/lib/cpus/aarch64/cortex_a78_ae.S b/lib/cpus/aarch64/cortex_a78_ae.S index 27adc381b..d56f83544 100644 --- a/lib/cpus/aarch64/cortex_a78_ae.S +++ b/lib/cpus/aarch64/cortex_a78_ae.S @@ -214,7 +214,7 @@ func cortex_a78_ae_reset_func bl errata_a78_ae_2395408_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 bic x0, x0, #CORTEX_A78_ACTLR_TAM_BIT diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index ec62519f5..827c0b0c7 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -585,7 +585,7 @@ func neoverse_n1_reset_func bl errata_n1_1946160_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index dbf5941e3..60d322f7f 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -545,7 +545,7 @@ func neoverse_n2_reset_func bl errata_n2_2388450_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, cptr_el3 orr x0, x0, #TAM_BIT diff --git a/lib/cpus/aarch64/rainier.S b/lib/cpus/aarch64/rainier.S index 584ab9747..3b7b8b27d 100644 --- a/lib/cpus/aarch64/rainier.S +++ b/lib/cpus/aarch64/rainier.S @@ -94,7 +94,7 @@ func rainier_reset_func bl errata_n1_1868343_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 orr x0, x0, #RAINIER_ACTLR_AMEN_BIT diff --git a/lib/el3_runtime/aarch32/context_mgmt.c b/lib/el3_runtime/aarch32/context_mgmt.c index e7a0e5871..f31ee5dde 100644 --- a/lib/el3_runtime/aarch32/context_mgmt.c +++ b/lib/el3_runtime/aarch32/context_mgmt.c @@ -136,7 +136,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) static void enable_extensions_nonsecure(bool el2_unused) { #if IMAGE_BL32 -#if ENABLE_AMU +#if ENABLE_FEAT_AMU amu_enable(el2_unused); #endif diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 04b685f2d..bb6db9f4d 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -485,7 +485,7 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) spe_enable(el2_unused); } -#if ENABLE_AMU +#if ENABLE_FEAT_AMU amu_enable(el2_unused, ctx); #endif diff --git a/lib/extensions/amu/amu.mk b/lib/extensions/amu/amu.mk index 0d203cb1f..868ab1254 100644 --- a/lib/extensions/amu/amu.mk +++ b/lib/extensions/amu/amu.mk @@ -10,8 +10,8 @@ AMU_SOURCES := lib/extensions/amu/${ARCH}/amu.c \ lib/extensions/amu/${ARCH}/amu_helpers.S ifneq (${ENABLE_AMU_AUXILIARY_COUNTERS},0) - ifeq (${ENABLE_AMU},0) - $(error AMU auxiliary counter support (`ENABLE_AMU_AUXILIARY_COUNTERS`) requires AMU support (`ENABLE_AMU`)) + ifeq (${ENABLE_FEAT_AMU},0) + $(error AMU auxiliary counter support (`ENABLE_AMU_AUXILIARY_COUNTERS`) requires AMU support (`ENABLE_FEAT_AMU`)) endif endif diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index b928fcf98..ddf81e613 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -133,9 +133,6 @@ ENABLE_BTI := 0 # Use BRANCH_PROTECTION to enable PAUTH. ENABLE_PAUTH := 0 -# Flag to enable access to the HAFGRTR_EL2 register -ENABLE_FEAT_AMUv1 := 0 - # Flag to enable AMUv1p1 extension. ENABLE_FEAT_AMUv1p1 := 0 @@ -367,7 +364,7 @@ endif # enabled at ELX. CTX_INCLUDE_MTE_REGS := 0 -ENABLE_AMU := 0 +ENABLE_FEAT_AMU := 0 ENABLE_AMU_AUXILIARY_COUNTERS := 0 ENABLE_AMU_FCONF := 0 AMU_RESTRICT_COUNTERS := 0 diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk index a14a0d8c0..109bfbec9 100644 --- a/plat/arm/board/arm_fpga/platform.mk +++ b/plat/arm/board/arm_fpga/platform.mk @@ -33,7 +33,7 @@ $(eval $(call add_define,FPGA_PRELOADED_DTB_BASE)) FPGA_PRELOADED_CMD_LINE := 0x1000 $(eval $(call add_define,FPGA_PRELOADED_CMD_LINE)) -ENABLE_AMU := 1 +ENABLE_FEAT_AMU := 2 # Treating this as a memory-constrained port for now USE_COHERENT_MEM := 0 diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index 1d96a2a63..0d254fb00 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -319,12 +319,12 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) endif # Enable Activity Monitor Unit extensions by default -ENABLE_AMU := 1 +ENABLE_FEAT_AMU := 2 # Enable dynamic mitigation support by default DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 -ifeq (${ENABLE_AMU},1) +ifneq (${ENABLE_FEAT_AMU},0) BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ lib/cpus/aarch64/cpuamu_helpers.S diff --git a/plat/arm/board/fvp_r/platform.mk b/plat/arm/board/fvp_r/platform.mk index 93b5cf246..5dd28b95d 100644 --- a/plat/arm/board/fvp_r/platform.mk +++ b/plat/arm/board/fvp_r/platform.mk @@ -69,7 +69,7 @@ FVP_R_BL_COMMON_SOURCES += drivers/delay_timer/generic_delay_timer.c endif # Enable Activity Monitor Unit extensions by default -ENABLE_AMU := 1 +ENABLE_FEAT_AMU := 2 ifneq (${ENABLE_STACK_PROTECTOR},0) FVP_R_BL_COMMON_SOURCES += plat/arm/board/fvp_r/fvp_r_stack_protector.c diff --git a/plat/arm/board/rdn2/platform.mk b/plat/arm/board/rdn2/platform.mk index b30e3fccd..ca55036dd 100644 --- a/plat/arm/board/rdn2/platform.mk +++ b/plat/arm/board/rdn2/platform.mk @@ -87,4 +87,4 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config)) override CTX_INCLUDE_AARCH32_REGS := 0 -override ENABLE_AMU := 1 +override ENABLE_FEAT_AMU := 1 diff --git a/plat/arm/board/rdv1/platform.mk b/plat/arm/board/rdv1/platform.mk index 11f52127e..a5fba6717 100644 --- a/plat/arm/board/rdv1/platform.mk +++ b/plat/arm/board/rdv1/platform.mk @@ -57,7 +57,7 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) override CTX_INCLUDE_AARCH32_REGS := 0 -override ENABLE_AMU := 1 +override ENABLE_FEAT_AMU := 1 ifneq ($(CSS_SGI_PLATFORM_VARIANT),0) $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1 should always be 0, \ diff --git a/plat/arm/board/rdv1mc/platform.mk b/plat/arm/board/rdv1mc/platform.mk index df0b09ae1..92f7c101f 100644 --- a/plat/arm/board/rdv1mc/platform.mk +++ b/plat/arm/board/rdv1mc/platform.mk @@ -68,7 +68,7 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) override CTX_INCLUDE_AARCH32_REGS := 0 -override ENABLE_AMU := 1 +override ENABLE_FEAT_AMU := 1 ifneq ($(CSS_SGI_PLATFORM_VARIANT),0) $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1-MC should always be 0, \ diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk index 5f4148c17..c6a82deef 100644 --- a/plat/arm/board/tc/platform.mk +++ b/plat/arm/board/tc/platform.mk @@ -163,7 +163,7 @@ override CTX_INCLUDE_PAUTH_REGS := 1 override ENABLE_SPE_FOR_NS := 0 -override ENABLE_AMU := 1 +override ENABLE_FEAT_AMU := 1 override ENABLE_AMU_AUXILIARY_COUNTERS := 1 override ENABLE_AMU_FCONF := 1 diff --git a/plat/mediatek/common/common_config.mk b/plat/mediatek/common/common_config.mk index 851eb2cc4..31a61e020 100644 --- a/plat/mediatek/common/common_config.mk +++ b/plat/mediatek/common/common_config.mk @@ -19,7 +19,7 @@ GIC_DEBUG := 0 ENABLE_STACK_PROTECTOR := strong # AMU, Kernel will access amuserenr_el0 if PE supported # Firmware _must_ implement AMU support -ENABLE_AMU := 1 +ENABLE_FEAT_AMU := 2 VENDOR_EXTEND_PUBEVENT_ENABLE := 1 # MTK define options diff --git a/plat/qti/msm8916/platform.mk b/plat/qti/msm8916/platform.mk index 60fb25d41..2baf2032a 100644 --- a/plat/qti/msm8916/platform.mk +++ b/plat/qti/msm8916/platform.mk @@ -43,7 +43,6 @@ SEPARATE_CODE_AND_RODATA := 1 WARMBOOT_ENABLE_DCACHE_EARLY := 1 # Disable features unsupported in ARMv8.0 -ENABLE_AMU := 0 ENABLE_SPE_FOR_NS := 0 ENABLE_SVE_FOR_NS := 0