Merge changes from topic "mp/test_espi" into integration

* changes:
  feat(fvp): new SiP call to set an interrupt pending
  refactor(arm): allow platform specific SiP support

include/plat/arm/common/arm_sip_svc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019,2021-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2019,2021-2023, Arm Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -35,4 +35,21 @@
 #define ARM_SIP_SVC_VERSION_MAJOR		U(0x0)
 #define ARM_SIP_SVC_VERSION_MINOR		U(0x2)
 
+/*
+ * Arm SiP SMC calls that are primarily used for testing purposes.
+ */
+#if PLAT_TEST_SPM
+#define ARM_SIP_SET_INTERRUPT_PENDING	U(0x82000100)
+#endif
+
+/* SiP handler specific to each Arm platform. */
+uintptr_t plat_arm_sip_handler(uint32_t smc_fid,
+				u_register_t x1,
+				u_register_t x2,
+				u_register_t x3,
+				u_register_t x4,
+				void *cookie,
+				void *handle,
+				u_register_t flags);
+
 #endif /* ARM_SIP_SVC_H */

plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts

@@ -35,6 +35,11 @@
 			load_address = <0x7000000>;
 			vcpu_count = <8>;
 			mem_size = <1048576>;
+			/*
+			 * Platform specific SiP SMC call handled at EL3. Used
+			 * to pend an interrupt for testing purpose.
+			 */
+			smc_whitelist = <0x82000100>;
 		};
 		vm2 {
 			is_ffa_partition;

plat/arm/board/fvp/platform.mk

@@ -28,6 +28,9 @@ FVP_DT_PREFIX		:= fvp-base-gicv3-psci
 # the FVP platform. This option defaults to 256.
 FVP_TRUSTED_SRAM_SIZE	:= 256
 
+# Macro to enable helpers for running SPM tests. Disabled by default.
+PLAT_TEST_SPM	:= 0
+
 # This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
 # progbits limit. We need a way to build all useful configurations while waiting
 # on the fvp to increase its SRAM size. The problem is twofild:
@@ -535,3 +538,6 @@ endif
 ifeq (${ERRATA_ABI_SUPPORT}, 1)
 include plat/arm/board/fvp/fvp_cpu_errata.mk
 endif
+
+# Build macro necessary for running SPM tests on FVP platform
+$(eval $(call add_define,PLAT_TEST_SPM))

plat/arm/common/arm_common.mk

@@ -331,9 +331,11 @@ endif
 ifeq (${ARCH}, aarch64)
 BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
 				plat/arm/common/arm_sip_svc.c			\
+				plat/arm/common/plat_arm_sip_svc.c		\
 				${ARM_SVC_HANDLER_SRCS}
 else
 BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
+				plat/arm/common/plat_arm_sip_svc.c		\
 				${ARM_SVC_HANDLER_SRCS}
 endif
 endif

plat/arm/common/arm_sip_svc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -13,9 +13,6 @@
 #include <lib/pmf/pmf.h>
 #include <plat/arm/common/arm_sip_svc.h>
 #include <plat/arm/common/plat_arm.h>
-#if ENABLE_SPMD_LP
-#include <services/el3_spmd_logical_sp.h>
-#endif
 #include <tools_share/uuid.h>
 
 /* ARM SiP Service UUID */
@@ -136,15 +133,16 @@ static uintptr_t arm_sip_handler(unsigned int smc_fid,
 		SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR);
 
 	default:
-#if ENABLE_SPMD_LP
+		break;
-		return plat_spmd_logical_sp_smc_handler(smc_fid, x1, x2, x3, x4,
-				cookie, handle, flags);
-#else
-		WARN("Unimplemented ARM SiP Service Call: 0x%x \n", smc_fid);
-		SMC_RET1(handle, SMC_UNK);
-#endif
 	}
 
+	/*
+	 * Fall back to allow Arm platform specific handler.
+	 * TODO: Refactor needed to move out generic handlers from this file and
+	 * only keep Arm Platform specific handlers here.
+	 */
+	return plat_arm_sip_handler(smc_fid, x1, x2, x3, x4,
+					cookie, handle, flags);
 }
 
 

plat/arm/common/plat_arm_sip_svc.c

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2023, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdint.h>
+
+#include <common/debug.h>
+#include <common/runtime_svc.h>
+
+#include <plat/arm/common/arm_sip_svc.h>
+#include <plat/common/platform.h>
+
+#if ENABLE_SPMD_LP
+#include <services/el3_spmd_logical_sp.h>
+#endif
+
+uintptr_t plat_arm_sip_handler(uint32_t smc_fid,
+				u_register_t x1,
+				u_register_t x2,
+				u_register_t x3,
+				u_register_t x4,
+				void *cookie,
+				void *handle,
+				u_register_t flags)
+{
+#if PLAT_TEST_SPM
+	bool secure_origin;
+
+	/* Determine which security state this SMC originated from */
+	secure_origin = is_caller_secure(flags);
+
+	switch (smc_fid) {
+	case ARM_SIP_SET_INTERRUPT_PENDING:
+		if (!secure_origin) {
+			SMC_RET1(handle, SMC_UNK);
+		}
+
+		VERBOSE("SiP Call- Set interrupt pending %d\n", (uint32_t)x1);
+		plat_ic_set_interrupt_pending(x1);
+
+		SMC_RET1(handle, SMC_OK);
+		break; /* Not reached */
+	default:
+		break;
+	}
+#endif
+
+#if ENABLE_SPMD_LP
+	return plat_spmd_logical_sp_smc_handler(smc_fid, x1, x2, x3, x4,
+				cookie, handle, flags);
+#else
+	WARN("Unimplemented ARM SiP Service Call: 0x%x\n", smc_fid);
+	SMC_RET1(handle, SMC_UNK);
+#endif
+}

plat/nuvoton/npcm845x/platform.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
 #
 # Copyright (c) 2017-2023 Nuvoton Ltd.
 #
@@ -273,9 +273,11 @@ ifeq (${ENABLE_PMF}, 1)
 ifeq (${ARCH}, aarch64)
 BL31_SOURCES	+=	plat/arm/common/aarch64/execution_state_switch.c \
 		plat/arm/common/arm_sip_svc.c \
+		plat/arm/common/plat_arm_sip_svc.c \
 		lib/pmf/pmf_smc.c
 else
 BL32_SOURCES	+=	plat/arm/common/arm_sip_svc.c \
+		plat/arm/common/plat_arm_sip_svc.c \
 		lib/pmf/pmf_smc.c
 endif
 endif