feat(cpufeat): add AArch32 PAN detection support

FEAT_PAN is implemented in AArch32 as well, provide the helper functions
to query the feature availability at runtime.

Change-Id: I375e3eb7b05955ea28a092ba99bb93302af48a0e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2023-05-23 13:56:55 +01:00
parent d3e71ead6e
commit d156c5220a
3 changed files with 24 additions and 0 deletions

View file

@ -119,6 +119,10 @@
#define ID_DFR1_MTPMU_MASK U(0xf)
#define ID_DFR1_MTPMU_SUPPORTED U(1)
/* ID_MMFR3 definitions */
#define ID_MMFR3_PAN_SHIFT U(16)
#define ID_MMFR3_PAN_MASK U(0xf)
/* ID_MMFR4 definitions */
#define ID_MMFR4_CNP_SHIFT U(12)
#define ID_MMFR4_CNP_LENGTH U(4)
@ -533,6 +537,7 @@
#define DCISW p15, 0, c7, c6, 2
#define CTR p15, 0, c0, c0, 1
#define CNTFRQ p15, 0, c14, c0, 0
#define ID_MMFR3 p15, 0, c0, c1, 7
#define ID_MMFR4 p15, 0, c0, c2, 6
#define ID_DFR0 p15, 0, c0, c1, 2
#define ID_DFR1 p15, 0, c0, c3, 5

View file

@ -116,4 +116,22 @@ static inline bool is_feat_spe_supported(void)
return false;
}
static inline unsigned int read_feat_pan_id_field(void)
{
return ISOLATE_FIELD(read_id_mmfr3(), ID_MMFR3_PAN);
}
static inline bool is_feat_pan_supported(void)
{
if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
return false;
}
if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
return true;
}
return read_feat_pan_id_field() != 0U;
}
#endif /* ARCH_FEATURES_H */

View file

@ -217,6 +217,7 @@ DEFINE_SYSREG_RW_FUNCS(cpsr)
******************************************************************************/
DEFINE_COPROCR_READ_FUNC(mpidr, MPIDR)
DEFINE_COPROCR_READ_FUNC(midr, MIDR)
DEFINE_COPROCR_READ_FUNC(id_mmfr3, ID_MMFR3)
DEFINE_COPROCR_READ_FUNC(id_mmfr4, ID_MMFR4)
DEFINE_COPROCR_READ_FUNC(id_dfr0, ID_DFR0)
DEFINE_COPROCR_READ_FUNC(id_pfr0, ID_PFR0)