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feat(tc): add firmware update secure partition

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Firmware update is a trusted service secure partition that implements
the PSA firmware update specification. It executes in the secure world
in total compute platform. To make it fit with Op-tee we need to reduce
its available memory.

Also, reserve 4 MB for stmm communication used for firmware update.
The firmware update secure partition and u-boot communicates using the
stmm communication layer and it needs a dedicated memory region.

Co-developed-by: Sergio Alves <sergio.dasilvalves@arm.com>
Co-developed-by: Davidson K <davidson.kumaresan@arm.com>
Signed-off-by: Tudor Cretu <tudor.cretu@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I0427549845f6c7650b8ef4e450d387fe9702a847
This commit is contained in:
Tudor Cretu 2021-09-24 12:09:53 +00:00 • committed by Boyan Karatotev
parent ba197f5f70
commit d0628728a6
5 changed files with 47 additions and 2 deletions
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5
fdts/tc.dts
View file

@ -220,6 +220,11 @@
compatible = "restricted-dma-pool";
reg = <0x00000000 0xf8e00000 0 0x00200000>;
};
fwu_mm@0xfca00000 {
reg = <0x00000000 0xfca00000 0 0x00400000>;
no-map;
};
};
psci {

32
plat/arm/board/tc/fdts/tc_spmc_common_sp_manifest.dtsi
View file

@ -4,6 +4,31 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
/*
* Secure world memory map. For a full view of the DRAM map, see platform_def.h
*
* 0xf900_c000 ------------------
* | ... |
* 0xf901_c000 ------------------
* | (63MB) | Trusty (=/=> OP-TEE)
* 0xfcf1_c000 ------------------
* | ... |
* 0xfd00_0000 ------------------
* | (512K) | Hafnium
* 0xfd08_0000 ------------------
* | ... | Hafnium stack
* 0xfd28_0000 ------------------
* | (11MB) | OP-TEE (=/=> Trusty)
* 0xfdd8_0000 ------------------
* | ... |
* 0xfde0_0000 ------------------
* | (2MB) | Firmware Upgrade
* 0xfec0_0000 ------------------
* | (2MB) | Crypto
* 0xfee0_0000 ------------------
* | (2MB) | Internal Truested Storage
* 0xff00_0000 ------------------
*/
&hafnium {
vm1 {
is_ffa_partition;
@ -25,5 +50,12 @@
vcpu_count = <1>;
mem_size = <0x200000>; /* 2MB TZC DRAM */
};
vm4 {
is_ffa_partition;
debug_name = "firmware-update";
load_address = <0xfde00000>;
vcpu_count = <1>;
mem_size = <0xe00000>; /* 14MB TZC DRAM */
};
#endif
};

6
plat/arm/board/tc/fdts/tc_spmc_manifest.dtsi
View file

@ -96,7 +96,11 @@
memory@1 {
device_type = "ns-memory";
reg = <0x0 0x80000000 0x0 0x79000000>,
reg =
#ifdef TS_SP_FW_CONFIG
<0x0 0x08000000 0x0 0x4000000>,
#endif /* TS_SP_FW_CONFIG */
<0x0 0x80000000 0x0 0x79000000>,
<0x80 0x80000000 0x1 0x80000000>;
};
};

2
plat/arm/board/tc/fdts/tc_spmc_optee_sp_manifest.dts
View file

@ -12,6 +12,6 @@
vm1 {
debug_name = "op-tee";
load_address = <0xfd280000>;
mem_size = <26738688>; /* 25MB TZC DRAM */
mem_size = <0xb00000>; /* 11MB TZC DRAM */
};
};

4
plat/arm/board/tc/fdts/tc_tb_fw_config.dts
View file

@ -41,6 +41,10 @@
uuid = "d9df52d5-16a2-4bb2-9aa4-d26d3b84e8c0";
load-address = <0xfec00000>;
};
firmware-update {
uuid = "6823a838-1b06-470e-9774-0cce8bfb53fd";
load-address = <0xfde00000>;
};
#endif
#if OPTEE_SP_FW_CONFIG
op-tee {