From cf0a75f04df8e90c7958304e6e0499a7d2e2519c Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Fri, 2 Sep 2022 23:38:23 +0200 Subject: [PATCH] feat(msm8916): add port for MSM8909 The Qualcomm Snapdragon 210 (MSM8909) SoC is very similar to the existing MSM8916, except for: - ARM Cortex-A7 instead of Cortex-A53 (AArch32-only) - MMU-500 r2p0 instead of r0p0 (need to clear CACHE_LOCK bit) - Different default BL31 address and UART number Make the existing MSM8916 platform port usable for MSM8909 as well by adding some minimal if statements where necessary plus the platform make files for msm8909. Change-Id: I8eca5bd8f2486cc2174562fb5de28f8dffa0d874 Signed-off-by: Stephan Gerhold --- plat/qti/msm8909/platform.mk | 13 +++++++++++++ plat/qti/msm8909/sp_min/sp_min-msm8909.mk | 7 +++++++ plat/qti/msm8916/msm8916_setup.c | 4 ++++ plat/qti/msm8916/platform.mk | 7 +++++-- 4 files changed, 29 insertions(+), 2 deletions(-) create mode 100644 plat/qti/msm8909/platform.mk create mode 100644 plat/qti/msm8909/sp_min/sp_min-msm8909.mk diff --git a/plat/qti/msm8909/platform.mk b/plat/qti/msm8909/platform.mk new file mode 100644 index 000000000..8a88aa59d --- /dev/null +++ b/plat/qti/msm8909/platform.mk @@ -0,0 +1,13 @@ +# +# Copyright (c) 2022-2023, Stephan Gerhold +# +# SPDX-License-Identifier: BSD-3-Clause +# + +ARM_ARCH_MAJOR := 7 +ARM_CORTEX_A7 := yes + +BL31_BASE ?= 0x87e80000 +QTI_UART_NUM ?= 1 + +include plat/qti/msm8916/platform.mk diff --git a/plat/qti/msm8909/sp_min/sp_min-msm8909.mk b/plat/qti/msm8909/sp_min/sp_min-msm8909.mk new file mode 100644 index 000000000..28a6f01b3 --- /dev/null +++ b/plat/qti/msm8909/sp_min/sp_min-msm8909.mk @@ -0,0 +1,7 @@ +# +# Copyright (c) 2022-2023, Stephan Gerhold +# +# SPDX-License-Identifier: BSD-3-Clause +# + +include plat/qti/msm8916/sp_min/sp_min-msm8916.mk diff --git a/plat/qti/msm8916/msm8916_setup.c b/plat/qti/msm8916/msm8916_setup.c index e9d4d34b9..270bae1c3 100644 --- a/plat/qti/msm8916/msm8916_setup.c +++ b/plat/qti/msm8916/msm8916_setup.c @@ -47,7 +47,11 @@ struct uartdm_gpios { }; static const struct uartdm_gpios uartdm_gpio_map[] = { +#if defined(PLAT_msm8909) + {4, 5, 0x2}, {20, 21, 0x3}, +#elif defined(PLAT_msm8916) {0, 1, 0x2}, {4, 5, 0x2}, +#endif }; /* diff --git a/plat/qti/msm8916/platform.mk b/plat/qti/msm8916/platform.mk index 7e698fba0..2110494fe 100644 --- a/plat/qti/msm8916/platform.mk +++ b/plat/qti/msm8916/platform.mk @@ -17,7 +17,8 @@ PLAT_BL_COMMON_SOURCES := ${GICV2_SOURCES} \ plat/qti/msm8916/${ARCH}/msm8916_helpers.S \ plat/qti/msm8916/${ARCH}/uartdm_console.S -MSM8916_PM_SOURCES := lib/cpus/${ARCH}/cortex_a53.S \ +MSM8916_CPU := $(if ${ARM_CORTEX_A7},cortex_a7,cortex_a53) +MSM8916_PM_SOURCES := lib/cpus/${ARCH}/${MSM8916_CPU}.S \ plat/common/plat_psci_common.c \ plat/qti/msm8916/msm8916_config.c \ plat/qti/msm8916/msm8916_cpu_boot.c \ @@ -48,10 +49,11 @@ WARMBOOT_ENABLE_DCACHE_EARLY := 1 ENABLE_SPE_FOR_NS := 0 ENABLE_SVE_FOR_NS := 0 -# Disable workarounds unnecessary for Cortex-A53 +# Disable workarounds unnecessary for Cortex-A7/A53 WORKAROUND_CVE_2017_5715 := 0 WORKAROUND_CVE_2022_23960 := 0 +ifeq (${MSM8916_CPU},cortex_a53) # MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply ERRATA_A53_819472 := 1 ERRATA_A53_824069 := 1 @@ -62,6 +64,7 @@ ERRATA_A53_836870 := 1 ERRATA_A53_843419 := 1 ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3 ERRATA_A53_1530924 := 1 +endif # Build config flags # ------------------