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feat(plat/qemu): add sdei support for QEMU
Add sdei support for QEMU, this is to let jailhouse Hypervisor use SDEI to do hypervisor management, after physical IRQ has been disabled routing. Note: To enable SDEI in QEMU, it needs to set "SDEI_SUPPORT=1 EL3_EXCEPTION_HANDLING=1" when compiling. Signed-off-by: Dongjiu Geng <gengdongjiu1@gmail.com> Change-Id: Ia7f9c5a0db36da03e5c6e6fb1270281f19924d77
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3 changed files with 60 additions and 3 deletions
30
plat/qemu/common/qemu_sdei.c
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30
plat/qemu/common/qemu_sdei.c
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@ -0,0 +1,30 @@
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/*
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* Copyright (c) 2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* SDEI configuration for ARM platforms */
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#include <bl31/ehf.h>
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#include <common/debug.h>
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#include <lib/utils_def.h>
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#include <services/sdei.h>
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#include <platform_def.h>
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/* Private event mappings */
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static sdei_ev_map_t qemu_sdei_private[] = {
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SDEI_DEFINE_EVENT_0(PLAT_SDEI_SGI_PRIVATE),
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};
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/* Shared event mappings */
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static sdei_ev_map_t qemu_sdei_shared[] = {
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};
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void plat_sdei_setup(void)
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{
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INFO("SDEI platform setup\n");
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}
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/* Export Arm SDEI events */
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REGISTER_SDEI_MAP(qemu_sdei_private, qemu_sdei_shared);
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@ -244,8 +244,7 @@
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* interrupts.
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* interrupts.
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*****************************************************************************/
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*****************************************************************************/
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#define PLATFORM_G1S_PROPS(grp) \
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#define PLATFORM_G1S_PROPS(grp) \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_0, GIC_HIGHEST_SEC_PRIORITY, \
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DESC_G1S_IRQ_SEC_SGI_0(grp) \
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grp, GIC_INTR_CFG_EDGE), \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_1, GIC_HIGHEST_SEC_PRIORITY, \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_1, GIC_HIGHEST_SEC_PRIORITY, \
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grp, GIC_INTR_CFG_EDGE), \
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grp, GIC_INTR_CFG_EDGE), \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_2, GIC_HIGHEST_SEC_PRIORITY, \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_2, GIC_HIGHEST_SEC_PRIORITY, \
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@ -261,7 +260,19 @@
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, \
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grp, GIC_INTR_CFG_EDGE)
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grp, GIC_INTR_CFG_EDGE)
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#define PLATFORM_G0_PROPS(grp)
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#if SDEI_SUPPORT
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#define DESC_G0_IRQ_SEC_SGI(grp) \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_0, PLAT_SDEI_NORMAL_PRI, (grp), \
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GIC_INTR_CFG_EDGE)
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#define DESC_G1S_IRQ_SEC_SGI_0(grp)
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#else
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#define DESC_G0_IRQ_SEC_SGI(grp)
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#define DESC_G1S_IRQ_SEC_SGI_0(grp) \
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INTR_PROP_DESC(QEMU_IRQ_SEC_SGI_0, PLAT_SDEI_NORMAL_PRI, (grp), \
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GIC_INTR_CFG_EDGE),
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#endif
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#define PLATFORM_G0_PROPS(grp) DESC_G0_IRQ_SEC_SGI(grp)
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/*
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/*
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* DT related constants
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* DT related constants
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@ -269,6 +280,14 @@
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#define PLAT_QEMU_DT_BASE NS_DRAM0_BASE
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#define PLAT_QEMU_DT_BASE NS_DRAM0_BASE
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#define PLAT_QEMU_DT_MAX_SIZE 0x100000
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#define PLAT_QEMU_DT_MAX_SIZE 0x100000
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/*
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* Platforms macros to support SDEI
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*/
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#define PLAT_PRI_BITS U(3)
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#define PLAT_SDEI_CRITICAL_PRI 0x60
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#define PLAT_SDEI_NORMAL_PRI 0x70
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#define PLAT_SDEI_SGI_PRIVATE QEMU_IRQ_SEC_SGI_0
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/*
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/*
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* System counter
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* System counter
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*/
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*/
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@ -230,6 +230,10 @@ BL31_SOURCES += ${QEMU_CPU_LIBS} \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
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${QEMU_GIC_SOURCES}
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${QEMU_GIC_SOURCES}
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ifeq (${SDEI_SUPPORT}, 1)
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BL31_SOURCES += plat/qemu/common/qemu_sdei.c
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endif
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# Pointer Authentication sources
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# Pointer Authentication sources
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ifeq (${ENABLE_PAUTH}, 1)
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ifeq (${ENABLE_PAUTH}, 1)
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PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
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PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \
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@ -323,3 +327,7 @@ qemu_fw.rom: qemu_fw.bios
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ifneq (${BL33},)
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ifneq (${BL33},)
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all: qemu_fw.bios qemu_fw.rom
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all: qemu_fw.bios qemu_fw.rom
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endif
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/common/aarch64/plat_ehf.c
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endif
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