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refactor(cpufeat): decouple FGT feature detection and build flags
Split the feature check for FEAT_FGT into two parts: - A boolean function that just evaluates whether the feature is usable. This takes build time flags into account, and only evaluates the CPU feature ID registers when the flexible FEAT_STATE_CHECK method is used. - A "raw" function that returns the unfiltered CPU feature ID register. Change the callers where needed, to give them the version they actually want. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I9a041132d280451f5d9f653a62904f603b2a916d
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3 changed files with 19 additions and 5 deletions
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@ -346,7 +346,7 @@ void detect_arch_features(void)
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/* v8.6 features */
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read_feat_amuv1p1();
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check_feature(ENABLE_FEAT_FGT, is_armv8_6_fgt_present(), "FGT");
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check_feature(ENABLE_FEAT_FGT, read_feat_fgt_id_field(), "FGT");
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read_feat_ecv();
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read_feat_twed();
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@ -10,6 +10,7 @@
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#include <stdbool.h>
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#include <arch_helpers.h>
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#include <common/feat_detect.h>
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static inline bool is_armv7_gentimer_present(void)
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{
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@ -97,10 +98,23 @@ static inline bool is_armv8_6_twed_present(void)
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ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
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}
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static inline bool is_armv8_6_fgt_present(void)
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static unsigned int read_feat_fgt_id_field(void)
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{
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return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_FGT_SHIFT) &
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ID_AA64MMFR0_EL1_FGT_MASK) != 0U;
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return (read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_FGT_SHIFT) &
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ID_AA64MMFR0_EL1_FGT_MASK;
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}
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static inline bool is_feat_fgt_supported(void)
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{
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if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_fgt_id_field() != 0U;
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}
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static inline unsigned long int get_armv8_6_ecv_support(void)
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@ -359,7 +359,7 @@ static void setup_context_common(cpu_context_t *ctx, const entry_point_info_t *e
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&& (GET_M32(ep->spsr) == MODE32_hyp))) {
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scr_el3 |= SCR_HCE_BIT;
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if (is_armv8_6_fgt_present()) {
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if (is_feat_fgt_supported()) {
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scr_el3 |= SCR_FGTEN_BIT;
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}
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