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Merge "fix(st-ddr): express memory size with size_t type" into integration

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This commit is contained in:
Manish Pandey 2023-09-20 15:58:41 +02:00 • committed by TrustedFirmware Code Review
commit cd83a766d5
5 changed files with 47 additions and 52 deletions
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23
drivers/st/ddr/stm32mp1_ram.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2018-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
@ -56,7 +56,8 @@ static int stm32mp1_ddr_setup(void)
int ret;
struct stm32mp_ddr_config config;
int node;
uint32_t uret;
uintptr_t uret;
size_t retsize;
void *fdt;
const struct stm32mp_ddr_param param[] = {
@ -106,26 +107,28 @@ static int stm32mp1_ddr_setup(void)
}
uret = stm32mp_ddr_test_data_bus();
if (uret != 0U) {
ERROR("DDR data bus test: can't access memory @ 0x%x\n",
if (uret != 0UL) {
ERROR("DDR data bus test: can't access memory @ 0x%lx\n",
uret);
panic();
}
uret = stm32mp_ddr_test_addr_bus(config.info.size);
if (uret != 0U) {
ERROR("DDR addr bus test: can't access memory @ 0x%x\n",
if (uret != 0UL) {
ERROR("DDR addr bus test: can't access memory @ 0x%lx\n",
uret);
panic();
}
uret = stm32mp_ddr_check_size();
if (uret < config.info.size) {
ERROR("DDR size: 0x%x does not match DT config: 0x%x\n",
uret, config.info.size);
retsize = stm32mp_ddr_check_size();
if (retsize < config.info.size) {
ERROR("DDR size: 0x%zx does not match DT config: 0x%zx\n",
retsize, config.info.size);
panic();
}
INFO("Memory size = 0x%zx (%zu MB)\n", retsize, retsize / (1024U * 1024U));
if (stm32mp_unmap_ddr() != 0) {
panic();
}

54
drivers/st/ddr/stm32mp_ddr_test.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -18,19 +18,19 @@
* Note that the previous content is restored after test.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_rw_access(void)
uintptr_t stm32mp_ddr_test_rw_access(void)
{
uint32_t saved_value = mmio_read_32(STM32MP_DDR_BASE);
mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
return (uint32_t)STM32MP_DDR_BASE;
return STM32MP_DDR_BASE;
}
mmio_write_32(STM32MP_DDR_BASE, saved_value);
return 0U;
return 0UL;
}
/*******************************************************************************
@ -41,7 +41,7 @@ uint32_t stm32mp_ddr_test_rw_access(void)
* File: memtest.c - This source code belongs to Public Domain.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_data_bus(void)
uintptr_t stm32mp_ddr_test_data_bus(void)
{
uint32_t pattern;
@ -49,11 +49,11 @@ uint32_t stm32mp_ddr_test_data_bus(void)
mmio_write_32(STM32MP_DDR_BASE, pattern);
if (mmio_read_32(STM32MP_DDR_BASE) != pattern) {
return (uint32_t)STM32MP_DDR_BASE;
return STM32MP_DDR_BASE;
}
}
return 0;
return 0UL;
}
/*******************************************************************************
@ -65,38 +65,34 @@ uint32_t stm32mp_ddr_test_data_bus(void)
* size: size in bytes of the DDR memory device.
* Returns 0 if success, and address value else.
******************************************************************************/
uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
uintptr_t stm32mp_ddr_test_addr_bus(size_t size)
{
uint64_t addressmask = size - 1U;
uint64_t offset;
uint64_t testoffset = 0U;
size_t addressmask = size - 1U;
size_t offset;
size_t testoffset = 0U;
/* Write the default pattern at each of the power-of-two offsets. */
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1U) {
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset,
DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + offset, DDR_PATTERN);
}
/* Check for address bits stuck high. */
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1U) {
if (mmio_read_32(STM32MP_DDR_BASE + (uint32_t)offset) !=
DDR_PATTERN) {
return (uint32_t)(STM32MP_DDR_BASE + offset);
if (mmio_read_32(STM32MP_DDR_BASE + offset) != DDR_PATTERN) {
return STM32MP_DDR_BASE + offset;
}
}
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
/* Check for address bits stuck low or shorted. */
for (testoffset = sizeof(uint32_t); (testoffset & addressmask) != 0U;
testoffset <<= 1U) {
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_ANTIPATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_ANTIPATTERN);
if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) {
return STM32MP_DDR_BASE;
@ -104,18 +100,16 @@ uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
for (offset = sizeof(uint32_t); (offset & addressmask) != 0U;
offset <<= 1) {
if ((mmio_read_32(STM32MP_DDR_BASE +
(uint32_t)offset) != DDR_PATTERN) &&
if ((mmio_read_32(STM32MP_DDR_BASE + offset) != DDR_PATTERN) &&
(offset != testoffset)) {
return (uint32_t)(STM32MP_DDR_BASE + offset);
return STM32MP_DDR_BASE + offset;
}
}
mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset,
DDR_PATTERN);
mmio_write_32(STM32MP_DDR_BASE + testoffset, DDR_PATTERN);
}
return 0U;
return 0UL;
}
/*******************************************************************************
@ -125,9 +119,9 @@ uint32_t stm32mp_ddr_test_addr_bus(uint64_t size)
* restore its content.
* Returns DDR computed size.
******************************************************************************/
uint32_t stm32mp_ddr_check_size(void)
size_t stm32mp_ddr_check_size(void)
{
uint32_t offset = sizeof(uint32_t);
size_t offset = sizeof(uint32_t);
mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN);
@ -142,7 +136,5 @@ uint32_t stm32mp_ddr_check_size(void)
offset <<= 1U;
}
INFO("Memory size = 0x%x (%u MB)\n", offset, offset / (1024U * 1024U));
return offset;
}

6
drivers/st/ddr/stm32mp_ram.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -23,8 +23,8 @@ int stm32mp_ddr_dt_get_info(void *fdt, int node, struct stm32mp_ddr_info *info)
VERBOSE("%s: no st,mem-speed\n", __func__);
return -EINVAL;
}
ret = fdt_read_uint32(fdt, node, "st,mem-size", &info->size);
if (ret < 0) {
info->size = dt_get_ddr_size();
if (info->size == 0U) {
VERBOSE("%s: no st,mem-size\n", __func__);
return -EINVAL;
}

6
include/drivers/st/stm32mp_ddr.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
@ -53,8 +53,8 @@ struct stm32mp_ddr_priv {
struct stm32mp_ddr_info {
const char *name;
uint32_t speed; /* in kHZ */
uint32_t size; /* Memory size in byte = col * row * width */
uint32_t speed; /* in kHz */
size_t size; /* Memory size in byte = col * row * width */
};
#define TIMEOUT_US_1S 1000000U

10
include/drivers/st/stm32mp_ddr_test.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
* Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,9 +9,9 @@
#include <stdint.h>
uint32_t stm32mp_ddr_test_rw_access(void);
uint32_t stm32mp_ddr_test_data_bus(void);
uint32_t stm32mp_ddr_test_addr_bus(uint64_t size);
uint32_t stm32mp_ddr_check_size(void);
uintptr_t stm32mp_ddr_test_rw_access(void);
uintptr_t stm32mp_ddr_test_data_bus(void);
uintptr_t stm32mp_ddr_test_addr_bus(size_t size);
size_t stm32mp_ddr_check_size(void);
#endif /* STM32MP_DDR_TEST_H */