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rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.40. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update Change-Id: If675796a2314e769602af21bf5cc6b10962d4f29
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2 changed files with 3 additions and 3 deletions
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@ -2080,8 +2080,8 @@ static void dbsc_regset(void)
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/* DBTR9.TRDPR : tRTP */
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/* DBTR9.TRDPR : tRTP */
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mmio_write_32(DBSC_DBTR(9), js2[js2_trtp]);
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mmio_write_32(DBSC_DBTR(9), js2[js2_trtp]);
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/* DBTR10.TWR : nWR + 1 */
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/* DBTR10.TWR : nWR */
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mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr + 1);
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mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr);
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/*
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/*
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* DBTR11.TRDWR : RL + BL / 2 + Rounddown(tRPST) + PHY_ODTLoff -
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* DBTR11.TRDWR : RL + BL / 2 + Rounddown(tRPST) + PHY_ODTLoff -
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@ -5,7 +5,7 @@
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#define RCAR_DDR_VERSION "rev.0.39"
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#define RCAR_DDR_VERSION "rev.0.40"
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#define DRAM_CH_CNT 0x04
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#define DRAM_CH_CNT 0x04
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#define SLICE_CNT 0x04
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#define SLICE_CNT 0x04
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#define CS_CNT 0x02
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#define CS_CNT 0x02
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