diff --git a/lib/cpus/aarch64/rainier.S b/lib/cpus/aarch64/rainier.S index 3017a5012..584ab9747 100644 --- a/lib/cpus/aarch64/rainier.S +++ b/lib/cpus/aarch64/rainier.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Arm Limited. All rights reserved. + * Copyright (c) 2020-2022, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -41,6 +41,40 @@ func rainier_disable_speculative_loads ret endfunc rainier_disable_speculative_loads + /* -------------------------------------------------- + * Errata Workaround for Neoverse N1 Errata #1868343. + * This applies to revision <= r4p0 of Neoverse N1. + * This workaround is the same as the workaround for + * errata 1262606 and 1275112 but applies to a wider + * revision range. + * Rainier R0P0 is based on Neoverse N1 R4P0 so the + * workaround checks for r0p0 version of Rainier CPU. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0, x1 & x17 + * -------------------------------------------------- + */ +func errata_n1_1868343_wa + /* + * Compare x0 against revision r4p0 + */ + mov x17, x30 + bl check_errata_1868343 + cbz x0, 1f + mrs x1, RAINIER_CPUACTLR_EL1 + orr x1, x1, RAINIER_CPUACTLR_EL1_BIT_13 + msr RAINIER_CPUACTLR_EL1, x1 + isb +1: + ret x17 +endfunc errata_n1_1868343_wa + +func check_errata_1868343 + /* Applies to r0p0 of Rainier CPU */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_1868343 + func rainier_reset_func mov x19, x30 @@ -55,6 +89,11 @@ func rainier_reset_func bl cpu_get_rev_var mov x18, x0 +#if ERRATA_N1_1868343 + mov x0, x18 + bl errata_n1_1868343_wa +#endif + #if ENABLE_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 @@ -101,6 +140,12 @@ func rainier_errata_report bl cpu_get_rev_var mov x8, x0 + /* + * Report all errata. The revision-variant information is passed to + * checking functions of each errata. + */ + report_errata ERRATA_N1_1868343, rainier, 1868343 + ldp x8, x30, [sp], #16 ret endfunc rainier_errata_report diff --git a/plat/arm/board/morello/platform.mk b/plat/arm/board/morello/platform.mk index 26a191154..86047e39f 100644 --- a/plat/arm/board/morello/platform.mk +++ b/plat/arm/board/morello/platform.mk @@ -83,6 +83,9 @@ override CTX_INCLUDE_AARCH32_REGS := 0 override ARM_PLAT_MT := 1 +# Errata workarounds: +ERRATA_N1_1868343 := 1 + # Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the # SCP during power management operations and for SCP RAM Firmware transfer. CSS_USE_SCMI_SDS_DRIVER := 1