diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 7ba79b9ad..03b3ee5ba 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -256,6 +256,10 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1946160``: This applies errata 1946160 workaround to Cortex-A76 CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU. +- ``ERRATA_A76_2743102``: This applies errata 2743102 workaround to Cortex-A76 + CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is + still open. + For Cortex-A77, the following errata build flags are defined : - ``ERRATA_A77_1508412``: This applies errata 1508412 workaround to Cortex-A77 @@ -399,6 +403,10 @@ For Neoverse N1, the following errata build flags are defined : CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for revisions r0p0, r1p0, and r2p0 there is no workaround. +- ``ERRATA_N1_2743102``: This applies errata 2743102 workaround to Neoverse-N1 + CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is + still open. + For Neoverse V1, the following errata build flags are defined : - ``ERRATA_V1_1618635``: This applies errata 1618635 workaround to Neoverse-V1 diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S index 6d4017a27..36507defe 100644 --- a/lib/cpus/aarch64/cortex_a76.S +++ b/lib/cpus/aarch64/cortex_a76.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -586,6 +586,30 @@ func check_errata_1946160 b cpu_rev_var_range endfunc check_errata_1946160 + /* ---------------------------------------------------- + * Errata Workaround for Cortex-A76 Errata #2743102 + * This applies to revisions <= r4p1 and is still open. + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * ---------------------------------------------------- + */ +func errata_a76_2743102_wa + mov x17, x30 + bl check_errata_2743102 + cbz x0, 1f + + /* dsb before isb of power down sequence */ + dsb sy +1: + ret x17 +endfunc errata_a76_2743102_wa + +func check_errata_2743102 + /* Applies to all revisions <= r4p1 */ + mov x1, #0x41 + b cpu_rev_var_ls +endfunc check_errata_2743102 + func check_errata_cve_2018_3639 #if WORKAROUND_CVE_2018_3639 mov x0, #ERRATA_APPLIES @@ -748,6 +772,12 @@ func cortex_a76_core_pwr_dwn mrs x0, CORTEX_A76_CPUPWRCTLR_EL1 orr x0, x0, #CORTEX_A76_CORE_PWRDN_EN_MASK msr CORTEX_A76_CPUPWRCTLR_EL1, x0 +#if ERRATA_A76_2743102 + mov x15, x30 + bl cpu_get_rev_var + bl errata_a76_2743102_wa + mov x30, x15 +#endif /* ERRATA_A76_2743102 */ isb ret endfunc cortex_a76_core_pwr_dwn @@ -768,6 +798,7 @@ func cortex_a76_errata_report */ report_errata ERRATA_A76_1073348, cortex_a76, 1073348 report_errata ERRATA_A76_1130799, cortex_a76, 1130799 + report_errata ERRATA_A76_1165522, cortex_a76, 1165522 report_errata ERRATA_A76_1220197, cortex_a76, 1220197 report_errata ERRATA_A76_1257314, cortex_a76, 1257314 report_errata ERRATA_A76_1262606, cortex_a76, 1262606 @@ -775,9 +806,9 @@ func cortex_a76_errata_report report_errata ERRATA_A76_1275112, cortex_a76, 1275112 report_errata ERRATA_A76_1286807, cortex_a76, 1286807 report_errata ERRATA_A76_1791580, cortex_a76, 1791580 - report_errata ERRATA_A76_1165522, cortex_a76, 1165522 report_errata ERRATA_A76_1868343, cortex_a76, 1868343 report_errata ERRATA_A76_1946160, cortex_a76, 1946160 + report_errata ERRATA_A76_2743102, cortex_a76, 2743102 report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639 report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953 report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184 diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index b75b0c17f..ec62519f5 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -468,6 +468,30 @@ func check_errata_1946160 b cpu_rev_var_range endfunc check_errata_1946160 + /* ---------------------------------------------------- + * Errata Workaround for Neoverse N1 Errata #2743102 + * This applies to revisions <= r4p1 and is still open. + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * ---------------------------------------------------- + */ +func errata_n1_2743102_wa + mov x17, x30 + bl check_errata_2743102 + cbz x0, 1f + + /* dsb before isb of power down sequence */ + dsb sy +1: + ret x17 +endfunc errata_n1_2743102_wa + +func check_errata_2743102 + /* Applies to all revisions <= r4p1 */ + mov x1, #0x41 + b cpu_rev_var_ls +endfunc check_errata_2743102 + func check_errata_cve_2022_23960 #if WORKAROUND_CVE_2022_23960 mov x0, #ERRATA_APPLIES @@ -613,6 +637,12 @@ func neoverse_n1_core_pwr_dwn mrs x0, NEOVERSE_N1_CPUPWRCTLR_EL1 orr x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0 +#if ERRATA_N1_2743102 + mov x15, x30 + bl cpu_get_rev_var + bl errata_n1_2743102_wa + mov x30, x15 +#endif /* ERRATA_N1_2743102 */ isb ret endfunc neoverse_n1_core_pwr_dwn @@ -645,6 +675,7 @@ func neoverse_n1_errata_report report_errata ERRATA_N1_1542419, neoverse_n1, 1542419 report_errata ERRATA_N1_1868343, neoverse_n1, 1868343 report_errata ERRATA_N1_1946160, neoverse_n1, 1946160 + report_errata ERRATA_N1_2743102, neoverse_n1, 2743102 report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184 report_errata WORKAROUND_CVE_2022_23960, neoverse_n1, cve_2022_23960 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index b4421dda3..eb6d20f38 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -287,6 +287,10 @@ ERRATA_A76_1868343 ?=0 # only to revisions r3p0 - r4p1 of the Cortex A76 cpu. ERRATA_A76_1946160 ?=0 +# Flag to apply erratum 2743102 workaround during powerdown. This erratum +# applies to all revisions <= r4p1 of the Cortex A76 cpu and is still open. +ERRATA_A76_2743102 ?=0 + # Flag to apply erratum 1508412 workaround during reset. This erratum applies # only to revision <= r1p0 of the Cortex A77 cpu. ERRATA_A77_1508412 ?=0 @@ -450,6 +454,10 @@ ERRATA_N1_1868343 ?=0 # exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround. ERRATA_N1_1946160 ?=0 +# Flag to apply erratum 2743102 workaround during powerdown. This erratum +# applies to all revisions <= r4p1 of the Neoverse N1 cpu and is still open. +ERRATA_N1_2743102 ?=0 + # Flag to apply erratum 2002655 workaround during reset. This erratum applies # to revisions r0p0 of the Neoverse-N2 cpu, it is still open. ERRATA_N2_2002655 ?=0 @@ -912,6 +920,10 @@ $(eval $(call add_define,ERRATA_A76_1868343)) $(eval $(call assert_boolean,ERRATA_A76_1946160)) $(eval $(call add_define,ERRATA_A76_1946160)) +# Process ERRATA_A76_2743102 flag +$(eval $(call assert_boolean,ERRATA_A76_2743102)) +$(eval $(call add_define,ERRATA_A76_2743102)) + # Process ERRATA_A77_1508412 flag $(eval $(call assert_boolean,ERRATA_A77_1508412)) $(eval $(call add_define,ERRATA_A77_1508412)) @@ -1072,6 +1084,10 @@ $(eval $(call add_define,ERRATA_N1_1868343)) $(eval $(call assert_boolean,ERRATA_N1_1946160)) $(eval $(call add_define,ERRATA_N1_1946160)) +# Process ERRATA_N1_2743102 flag +$(eval $(call assert_boolean,ERRATA_N1_2743102)) +$(eval $(call add_define,ERRATA_N1_2743102)) +# # Process ERRATA_N2_2002655 flag $(eval $(call assert_boolean,ERRATA_N2_2002655)) $(eval $(call add_define,ERRATA_N2_2002655))