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feat(stm32mp2-fdts): add UART and I2C nodes for STM32MP2

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Update stm32mp251.dtsi SoC DT file to include UART and I2C nodes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I6f52ec2c1735d28ba4a424af71e7eae5b0ac3e0d
This commit is contained in:
Yann Gautier 2022-04-21 15:30:45 +02:00 • committed by Maxime Méré
parent 817f42f07e
commit c7cfe27a24
1 changed files with 128 additions and 0 deletions
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128
fdts/stm32mp251.dtsi
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@ -98,6 +98,134 @@
status = "disabled";
};
usart3: serial@400f0000 {
compatible = "st,stm32h7-uart";
reg = <0x400f0000 0x400>;
clocks = <&rcc CK_KER_USART3>;
resets = <&rcc USART3_R>;
status = "disabled";
};
uart4: serial@40100000 {
compatible = "st,stm32h7-uart";
reg = <0x40100000 0x400>;
clocks = <&rcc CK_KER_UART4>;
resets = <&rcc UART4_R>;
status = "disabled";
};
uart5: serial@40110000 {
compatible = "st,stm32h7-uart";
reg = <0x40110000 0x400>;
clocks = <&rcc CK_KER_UART5>;
resets = <&rcc UART5_R>;
status = "disabled";
};
i2c1: i2c@40120000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40120000 0x400>;
clocks = <&rcc CK_KER_I2C1>;
resets = <&rcc I2C1_R>;
status = "disabled";
};
i2c2: i2c@40130000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40130000 0x400>;
clocks = <&rcc CK_KER_I2C2>;
resets = <&rcc I2C2_R>;
status = "disabled";
};
i2c3: i2c@40140000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40140000 0x400>;
clocks = <&rcc CK_KER_I2C3>;
resets = <&rcc I2C3_R>;
status = "disabled";
};
i2c4: i2c@40150000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40150000 0x400>;
clocks = <&rcc CK_KER_I2C4>;
resets = <&rcc I2C4_R>;
status = "disabled";
};
i2c5: i2c@40160000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40160000 0x400>;
clocks = <&rcc CK_KER_I2C5>;
resets = <&rcc I2C5_R>;
status = "disabled";
};
i2c6: i2c@40170000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40170000 0x400>;
clocks = <&rcc CK_KER_I2C6>;
resets = <&rcc I2C6_R>;
status = "disabled";
};
i2c7: i2c@40180000 {
compatible = "st,stm32mp25-i2c";
reg = <0x40180000 0x400>;
clocks = <&rcc CK_KER_I2C7>;
resets = <&rcc I2C7_R>;
status = "disabled";
};
usart6: serial@40220000 {
compatible = "st,stm32h7-uart";
reg = <0x40220000 0x400>;
clocks = <&rcc CK_KER_USART6>;
resets = <&rcc USART6_R>;
status = "disabled";
};
uart9: serial@402c0000 {
compatible = "st,stm32h7-uart";
reg = <0x402c0000 0x400>;
clocks = <&rcc CK_KER_UART9>;
resets = <&rcc UART9_R>;
status = "disabled";
};
usart1: serial@40330000 {
compatible = "st,stm32h7-uart";
reg = <0x40330000 0x400>;
clocks = <&rcc CK_KER_USART1>;
resets = <&rcc USART1_R>;
status = "disabled";
};
uart7: serial@40370000 {
compatible = "st,stm32h7-uart";
reg = <0x40370000 0x400>;
clocks = <&rcc CK_KER_UART7>;
resets = <&rcc UART7_R>;
status = "disabled";
};
uart8: serial@40380000 {
compatible = "st,stm32h7-uart";
reg = <0x40380000 0x400>;
clocks = <&rcc CK_KER_UART8>;
resets = <&rcc UART8_R>;
status = "disabled";
};
i2c8: i2c@46040000 {
compatible = "st,stm32mp25-i2c";
reg = <0x46040000 0x400>;
clocks = <&rcc CK_KER_I2C8>;
resets = <&rcc I2C8_R>;
status = "disabled";
};
sdmmc1: mmc@48220000 {
compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00353180>;