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feat(stm32mp1): optionally use paged OP-TEE

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STM32MP13 can encrypt the DDR. OP-TEE is then fully in DDR, and there
is no need for paged image on STM32MP13. The management of the paged
OP-TEE is made conditional, and will be kept only for STM32MP15.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I85ac7aaf6a172c4ee529736113ed40fe66835fd7
This commit is contained in:
Yann Gautier 2022-06-20 11:43:17 +02:00 • committed by Yann Gautier
parent c0a11cd869
commit c4dbcb8852
2 changed files with 28 additions and 12 deletions
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30
plat/st/stm32mp1/bl2_plat_setup.c
View file

@ -470,11 +470,13 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
/* Init base and size for pager if exist */
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
assert(paged_mem_params != NULL);
if (paged_mem_params != NULL) {
paged_mem_params->image_info.image_base = STM32MP_DDR_BASE +
(dt_get_ddr_size() - STM32MP_DDR_S_SIZE -
STM32MP_DDR_SHMEM_SIZE);
paged_mem_params->image_info.image_max_size = STM32MP_DDR_S_SIZE;
paged_mem_params->image_info.image_max_size =
STM32MP_DDR_S_SIZE;
}
break;
case BL33_IMAGE_ID:
@ -494,11 +496,17 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
case BL32_IMAGE_ID:
if (optee_header_is_valid(bl_mem_params->image_info.image_base)) {
image_info_t *paged_image_info = NULL;
/* BL32 is OP-TEE header */
bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base;
pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
assert(pager_mem_params != NULL);
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
assert((pager_mem_params != NULL) && (paged_mem_params != NULL));
if (paged_mem_params != NULL) {
paged_image_info = &paged_mem_params->image_info;
}
#if STM32MP_USE_STM32IMAGE && defined(AARCH32_SP_OPTEE)
/* Set OP-TEE extra image load areas at run-time */
@ -514,16 +522,22 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
err = parse_optee_header(&bl_mem_params->ep_info,
&pager_mem_params->image_info,
&paged_mem_params->image_info);
if (err) {
paged_image_info);
if (err != 0) {
ERROR("OPTEE header parse error.\n");
panic();
}
/* Set optee boot info from parsed header data */
bl_mem_params->ep_info.args.arg0 = paged_mem_params->image_info.image_base;
bl_mem_params->ep_info.args.arg1 = 0; /* Unused */
bl_mem_params->ep_info.args.arg2 = 0; /* No DT supported */
if (paged_mem_params != NULL) {
bl_mem_params->ep_info.args.arg0 =
paged_mem_params->image_info.image_base;
} else {
bl_mem_params->ep_info.args.arg0 = 0U;
}
bl_mem_params->ep_info.args.arg1 = 0U; /* Unused */
bl_mem_params->ep_info.args.arg2 = 0U; /* No DT supported */
} else {
#if !STM32MP_USE_STM32IMAGE
bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base;

4
plat/st/stm32mp1/plat_bl2_mem_params_desc.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -68,6 +68,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.next_handoff_image_id = INVALID_IMAGE_ID,
},
#if STM32MP15
/* Fill BL32 external 2 image related information */
{
.image_id = BL32_EXTRA2_IMAGE_ID,
@ -82,6 +83,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.next_handoff_image_id = INVALID_IMAGE_ID,
},
#endif
/* Fill HW_CONFIG related information if it exists */
{