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fix(plat/st): correct IO compensation disabling

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In stm32mp1_syscfg_disable_io_compensation(), to disable the IO
compensation cell, we have to set the corresponding bit in
SYSCFG_CMPENCLRR register, instead of clearing the bit in SETR register.

Change-Id: I510a50451f8afb9e98c24e1ea84efbf73a39e6b4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier 2020-10-26 15:21:25 +01:00 • committed by Yann Gautier
parent 72c7884092
commit c2d18ca80f
1 changed files with 3 additions and 3 deletions
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6
plat/st/stm32mp1/stm32mp1_syscfg.c
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2019-2020, STMicroelectronics - All Rights Reserved * Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -22,6 +22,7 @@
#define SYSCFG_ICNR 0x1CU #define SYSCFG_ICNR 0x1CU
#define SYSCFG_CMPCR 0x20U #define SYSCFG_CMPCR 0x20U
#define SYSCFG_CMPENSETR 0x24U #define SYSCFG_CMPENSETR 0x24U
#define SYSCFG_CMPENCLRR 0x28U
/* /*
* SYSCFG_BOOTR Register * SYSCFG_BOOTR Register
@ -167,8 +168,7 @@ void stm32mp1_syscfg_disable_io_compensation(void)
mmio_write_32(SYSCFG_BASE + SYSCFG_CMPCR, value | SYSCFG_CMPCR_SW_CTRL); mmio_write_32(SYSCFG_BASE + SYSCFG_CMPCR, value | SYSCFG_CMPCR_SW_CTRL);
mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPENSETR, mmio_setbits_32(SYSCFG_BASE + SYSCFG_CMPENCLRR, SYSCFG_CMPENSETR_MPU_EN);
SYSCFG_CMPENSETR_MPU_EN);
stm32mp1_clk_disable_non_secure(SYSCFG); stm32mp1_clk_disable_non_secure(SYSCFG);
} }