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feat(msm8916): add port for MSM8939

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The Qualcomm Snapdragon 615 (MSM8939) SoC is very similar to the
existing MSM8916, except for:

  - Two clusters with ARM Cortex-A53 cores
  - CCI-400

Make the existing MSM8916 platform port usable for MSM8939 as well by
adding some minimal if statements where necessary plus the platform
make files for msm8939.

Change-Id: I8cda83dc642f62222f984a42eec14de5df4c11e3
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
This commit is contained in:
Stephan Gerhold 2022-09-16 21:07:37 +02:00
parent c822d26506
commit c28e96cd52
6 changed files with 35 additions and 4 deletions
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6
plat/qti/msm8916/include/platform_def.h
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@ -25,8 +25,12 @@
#define CACHE_WRITEBACK_GRANULE U(64) #define CACHE_WRITEBACK_GRANULE U(64)
#define PLATFORM_STACK_SIZE SZ_4K #define PLATFORM_STACK_SIZE SZ_4K
/* CPU topology: single cluster with 4 cores */ /* CPU topology: one or two clusters with 4 cores each */
#ifdef PLAT_msm8939
#define PLATFORM_CLUSTER_COUNT U(2)
#else
#define PLATFORM_CLUSTER_COUNT U(1) #define PLATFORM_CLUSTER_COUNT U(1)
#endif
#define PLATFORM_CPU_PER_CLUSTER_SHIFT U(2) /* 4 */ #define PLATFORM_CPU_PER_CLUSTER_SHIFT U(2) /* 4 */
#define PLATFORM_CPUS_PER_CLUSTER (1 << PLATFORM_CPU_PER_CLUSTER_SHIFT) #define PLATFORM_CPUS_PER_CLUSTER (1 << PLATFORM_CPU_PER_CLUSTER_SHIFT)
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \

2
plat/qti/msm8916/msm8916_setup.c
View file

@ -49,7 +49,7 @@ struct uartdm_gpios {
static const struct uartdm_gpios uartdm_gpio_map[] = { static const struct uartdm_gpios uartdm_gpio_map[] = {
#if defined(PLAT_msm8909) #if defined(PLAT_msm8909)
{4, 5, 0x2}, {20, 21, 0x3}, {4, 5, 0x2}, {20, 21, 0x3},
#elif defined(PLAT_msm8916) #elif defined(PLAT_msm8916) || defined(PLAT_msm8939)
{0, 1, 0x2}, {4, 5, 0x2}, {0, 1, 0x2}, {4, 5, 0x2},
#endif #endif
}; };

6
plat/qti/msm8916/platform.mk
View file

@ -55,7 +55,9 @@ WORKAROUND_CVE_2017_5715 := 0
WORKAROUND_CVE_2022_23960 := 0 WORKAROUND_CVE_2022_23960 := 0
ifeq (${MSM8916_CPU},cortex_a53) ifeq (${MSM8916_CPU},cortex_a53)
# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply # The Cortex-A53 revision varies depending on the SoC revision.
# msm8916 uses r0p0, msm8939 uses r0p1 or r0p4. Enable all errata
# and rely on the runtime detection to apply them only if needed.
ERRATA_A53_819472 := 1 ERRATA_A53_819472 := 1
ERRATA_A53_824069 := 1 ERRATA_A53_824069 := 1
ERRATA_A53_826319 := 1 ERRATA_A53_826319 := 1
@ -63,7 +65,7 @@ ERRATA_A53_827319 := 1
ERRATA_A53_835769 := 1 ERRATA_A53_835769 := 1
ERRATA_A53_836870 := 1 ERRATA_A53_836870 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3 ERRATA_A53_855873 := 1
ERRATA_A53_1530924 := 1 ERRATA_A53_1530924 := 1
endif endif

11
plat/qti/msm8939/platform.mk Normal file
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@ -0,0 +1,11 @@
#
# Copyright (c) 2022-2023, Stephan Gerhold <stephan@gerhold.net>
#
# SPDX-License-Identifier: BSD-3-Clause
#
# Cache cannot be enabled early on MSM8939 because the CCI-400 must be
# enabled before the CPUs in both clusters become cache-coherent.
override WARMBOOT_ENABLE_DCACHE_EARLY := 0
include plat/qti/msm8916/platform.mk

7
plat/qti/msm8939/sp_min/sp_min-msm8939.mk Normal file
View file

@ -0,0 +1,7 @@
#
# Copyright (c) 2022-2023, Stephan Gerhold <stephan@gerhold.net>
#
# SPDX-License-Identifier: BSD-3-Clause
#
include plat/qti/msm8916/sp_min/sp_min-msm8916.mk

7
plat/qti/msm8939/tsp/tsp-msm8939.mk Normal file
View file

@ -0,0 +1,7 @@
#
# Copyright (c) 2023, Stephan Gerhold <stephan@gerhold.net>
#
# SPDX-License-Identifier: BSD-3-Clause
#
include plat/qti/msm8916/tsp/tsp-msm8916.mk