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feat(msm8916): add port for MSM8939
The Qualcomm Snapdragon 615 (MSM8939) SoC is very similar to the existing MSM8916, except for: - Two clusters with ARM Cortex-A53 cores - CCI-400 Make the existing MSM8916 platform port usable for MSM8939 as well by adding some minimal if statements where necessary plus the platform make files for msm8939. Change-Id: I8cda83dc642f62222f984a42eec14de5df4c11e3 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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c822d26506
commit
c28e96cd52
6 changed files with 35 additions and 4 deletions
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@ -25,8 +25,12 @@
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#define CACHE_WRITEBACK_GRANULE U(64)
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#define PLATFORM_STACK_SIZE SZ_4K
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/* CPU topology: single cluster with 4 cores */
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/* CPU topology: one or two clusters with 4 cores each */
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#ifdef PLAT_msm8939
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#define PLATFORM_CLUSTER_COUNT U(2)
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#else
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#define PLATFORM_CLUSTER_COUNT U(1)
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#endif
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#define PLATFORM_CPU_PER_CLUSTER_SHIFT U(2) /* 4 */
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#define PLATFORM_CPUS_PER_CLUSTER (1 << PLATFORM_CPU_PER_CLUSTER_SHIFT)
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#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \
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@ -49,7 +49,7 @@ struct uartdm_gpios {
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static const struct uartdm_gpios uartdm_gpio_map[] = {
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#if defined(PLAT_msm8909)
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{4, 5, 0x2}, {20, 21, 0x3},
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#elif defined(PLAT_msm8916)
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#elif defined(PLAT_msm8916) || defined(PLAT_msm8939)
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{0, 1, 0x2}, {4, 5, 0x2},
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#endif
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};
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@ -55,7 +55,9 @@ WORKAROUND_CVE_2017_5715 := 0
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WORKAROUND_CVE_2022_23960 := 0
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ifeq (${MSM8916_CPU},cortex_a53)
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# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply
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# The Cortex-A53 revision varies depending on the SoC revision.
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# msm8916 uses r0p0, msm8939 uses r0p1 or r0p4. Enable all errata
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# and rely on the runtime detection to apply them only if needed.
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ERRATA_A53_819472 := 1
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ERRATA_A53_824069 := 1
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ERRATA_A53_826319 := 1
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@ -63,7 +65,7 @@ ERRATA_A53_827319 := 1
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ERRATA_A53_835769 := 1
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ERRATA_A53_836870 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 0 # Workaround works only for >= r0p3
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ERRATA_A53_855873 := 1
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ERRATA_A53_1530924 := 1
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endif
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11
plat/qti/msm8939/platform.mk
Normal file
11
plat/qti/msm8939/platform.mk
Normal file
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@ -0,0 +1,11 @@
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#
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# Copyright (c) 2022-2023, Stephan Gerhold <stephan@gerhold.net>
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Cache cannot be enabled early on MSM8939 because the CCI-400 must be
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# enabled before the CPUs in both clusters become cache-coherent.
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override WARMBOOT_ENABLE_DCACHE_EARLY := 0
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include plat/qti/msm8916/platform.mk
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7
plat/qti/msm8939/sp_min/sp_min-msm8939.mk
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7
plat/qti/msm8939/sp_min/sp_min-msm8939.mk
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#
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# Copyright (c) 2022-2023, Stephan Gerhold <stephan@gerhold.net>
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include plat/qti/msm8916/sp_min/sp_min-msm8916.mk
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7
plat/qti/msm8939/tsp/tsp-msm8939.mk
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7
plat/qti/msm8939/tsp/tsp-msm8939.mk
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@ -0,0 +1,7 @@
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#
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# Copyright (c) 2023, Stephan Gerhold <stephan@gerhold.net>
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include plat/qti/msm8916/tsp/tsp-msm8916.mk
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