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chore(cm): add MDCR_EL3.RLTE to context management
The bit is already implicitly zero so no functional change. Adding it helps fully describe how we expect FEAT_TRF to behave. Change-Id: If7a7881e2b50188222ce46265b432d658a664c75 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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2 changed files with 7 additions and 2 deletions
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@ -697,6 +697,7 @@
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#define MDCR_TDOSA_BIT (ULL(1) << 10)
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#define MDCR_TDA_BIT (ULL(1) << 9)
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#define MDCR_TPM_BIT (ULL(1) << 6)
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#define MDCR_RLTE_BIT (ULL(1) << 0)
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#define MDCR_EL3_RESET_VAL MDCR_MTPME_BIT
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/* MDCR_EL2 definitions */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021-2024, Arm Limited. All rights reserved.
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* Copyright (c) 2021-2025, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -22,8 +22,12 @@ void trf_enable(cpu_context_t *ctx)
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* MDCR_EL3.TTRF = b0
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* Allow access of trace filter control registers from NS-EL2
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* and NS-EL1 when NS-EL2 is implemented but not used
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*
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* MDCR_EL3.RLTE = b0
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* Trace prohibited in Realm state, unless overridden by the
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* IMPLEMENTATION DEFINED authentication interface.
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*/
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mdcr_el3_val &= ~(MDCR_STE_BIT | MDCR_TTRF_BIT);
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mdcr_el3_val &= ~(MDCR_STE_BIT | MDCR_TTRF_BIT | MDCR_RLTE_BIT);
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write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
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}
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