From c1aa3fa5555250dfbcae99fb6944ad24c4ee6a0b Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Thu, 25 Jan 2024 15:38:46 -0600 Subject: [PATCH] fix(cpus): workaround for Cortex X3 erratum 2641945 Cortex X3 erratum 2641945 is a Cat B erratum that applies to all revisions <= r1p0 and is fixed in r1p1. The workaround is to disable the affected L1 data cache prefetcher by setting CPUACTLR6_EL1[41] to 1. Doing so will incur a performance penalty of ~1%. Contact Arm for an alternate workaround that impacts power. SDEN documentation: https://developer.arm.com/documentation/2055130/latest Change-Id: Ia6d6ac8a66936c63b8aa8d7698b937f42ba8f044 Signed-off-by: Bipin Ravi --- docs/design/cpu-specific-build-macros.rst | 4 ++++ include/lib/cpus/aarch64/cortex_x3.h | 5 +++++ lib/cpus/aarch64/cortex_x3.S | 6 ++++++ lib/cpus/cpu-ops.mk | 4 ++++ services/std_svc/errata_abi/errata_abi_main.c | 9 +++++---- 5 files changed, 24 insertions(+), 4 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 3485dc910..652c14203 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -791,6 +791,10 @@ For Cortex-X3, the following errata build flags are defined : CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the CPU, it is still open. +- ``ERRATA_X3_2641945``: This applies errata 2641945 workaround to Cortex-X3 + CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU. + It is fixed in r1p1. + - ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is fixed in r1p2. diff --git a/include/lib/cpus/aarch64/cortex_x3.h b/include/lib/cpus/aarch64/cortex_x3.h index 542907877..c5f820cf4 100644 --- a/include/lib/cpus/aarch64/cortex_x3.h +++ b/include/lib/cpus/aarch64/cortex_x3.h @@ -43,6 +43,11 @@ #define CORTEX_X3_CPUACTLR5_EL1_BIT_55 (ULL(1) << 55) #define CORTEX_X3_CPUACTLR5_EL1_BIT_56 (ULL(1) << 56) +/******************************************************************************* + * CPU Auxiliary Control register 6 specific definitions. + ******************************************************************************/ +#define CORTEX_X3_CPUACTLR6_EL1 S3_0_C15_C8_1 + /******************************************************************************* * CPU Extended Control register 2 specific definitions. ******************************************************************************/ diff --git a/lib/cpus/aarch64/cortex_x3.S b/lib/cpus/aarch64/cortex_x3.S index ea8926796..e5a05fca4 100644 --- a/lib/cpus/aarch64/cortex_x3.S +++ b/lib/cpus/aarch64/cortex_x3.S @@ -61,6 +61,12 @@ workaround_reset_end cortex_x3, ERRATUM(2615812) check_erratum_ls cortex_x3, ERRATUM(2615812), CPU_REV(1, 1) +workaround_runtime_start cortex_x3, ERRATUM(2641945), ERRATA_X3_2641945 + sysreg_bit_set CORTEX_X3_CPUACTLR6_EL1, BIT(41) +workaround_runtime_end cortex_x3, ERRATUM(2641945), NO_ISB + +check_erratum_ls cortex_x3, ERRATUM(2641945), CPU_REV(1, 0) + workaround_reset_start cortex_x3, ERRATUM(2742421), ERRATA_X3_2742421 /* Set CPUACTLR5_EL1[56:55] to 2'b01 */ sysreg_bit_set CORTEX_X3_CPUACTLR5_EL1, CORTEX_X3_CPUACTLR5_EL1_BIT_55 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index a99c08295..31430ae99 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -794,6 +794,10 @@ CPU_FLAG_LIST += ERRATA_X3_2313909 # to revisions r0p0, r1p0, r1p1 of the Cortex-X3 cpu, it is still open. CPU_FLAG_LIST += ERRATA_X3_2615812 +# Flag to apply erratum 2641945 workaround on reset. This erratum applies +# to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1. +CPU_FLAG_LIST += ERRATA_X3_2641945 + # Flag to apply erratum 2742421 workaround on reset. This erratum applies # to revisions r0p0, r1p0 and r1p1 of the Cortex-X3 cpu, it is fixed in r1p2. CPU_FLAG_LIST += ERRATA_X3_2742421 diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index f1342ad13..a2669d2cc 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -451,10 +451,11 @@ struct em_cpu_list cpu_list[] = { [2] = {2302506, 0x00, 0x11, ERRATA_X3_2302506}, [3] = {2313909, 0x00, 0x10, ERRATA_X3_2313909}, [4] = {2615812, 0x00, 0x11, ERRATA_X3_2615812}, - [5] = {2742421, 0x00, 0x11, ERRATA_X3_2742421}, - [6] = {2743088, 0x00, 0x11, ERRATA_X3_2743088}, - [7] = {2779509, 0x00, 0x11, ERRATA_X3_2779509}, - [8 ... ERRATA_LIST_END] = UNDEF_ERRATA, + [5] = {2641945, 0x00, 0x10, ERRATA_X3_2641945}, + [6] = {2742421, 0x00, 0x11, ERRATA_X3_2742421}, + [7] = {2743088, 0x00, 0x11, ERRATA_X3_2743088}, + [8] = {2779509, 0x00, 0x11, ERRATA_X3_2779509}, + [9 ... ERRATA_LIST_END] = UNDEF_ERRATA, } }, #endif /* CORTEX_X3_H_INC */