feat(nxp-clk): add a basic get_rate implementation

Replace the dummy implementation of clk_ops.get_rate with a basic
version that only handles the oscillator objects. Subsequent commits
will add more objects to this list.

Change-Id: I8c1bbbfa6b116fdcf5a1f1353bdb52b474bac831
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

drivers/nxp/clk/s32cc/s32cc_clk_drv.c

@@ -1,5 +1,5 @@
 /*
- * Copyright 2024 NXP
+ * Copyright 2024-2025 NXP
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -1059,11 +1059,6 @@ static bool s32cc_clk_is_enabled(unsigned long id)
 	return false;
 }
 
-static unsigned long s32cc_clk_get_rate(unsigned long id)
-{
-	return 0;
-}
-
 static int set_module_rate(const struct s32cc_clk_obj *module,
 			   unsigned long rate, unsigned long *orate,
 			   unsigned int *depth);
@@ -1091,6 +1086,29 @@ static int set_osc_freq(const struct s32cc_clk_obj *module, unsigned long rate,
 	return 0;
 }
 
+static int get_osc_freq(const struct s32cc_clk_obj *module,
+			const struct s32cc_clk_drv *drv,
+			unsigned long *rate, unsigned int depth)
+{
+	const struct s32cc_osc *osc = s32cc_obj2osc(module);
+	unsigned int ldepth = depth;
+	int ret;
+
+	ret = update_stack_depth(&ldepth);
+	if (ret != 0) {
+		return ret;
+	}
+
+	if (osc->freq == 0UL) {
+		ERROR("Uninitialized oscillator\n");
+		return -EINVAL;
+	}
+
+	*rate = osc->freq;
+
+	return 0;
+}
+
 static int set_clk_freq(const struct s32cc_clk_obj *module, unsigned long rate,
 			unsigned long *orate, unsigned int *depth)
 {
@@ -1319,6 +1337,31 @@ static int set_module_rate(const struct s32cc_clk_obj *module,
 	return ret;
 }
 
+static int get_module_rate(const struct s32cc_clk_obj *module,
+			   const struct s32cc_clk_drv *drv,
+			   unsigned long *rate,
+			   unsigned int depth)
+{
+	unsigned int ldepth = depth;
+	int ret = 0;
+
+	ret = update_stack_depth(&ldepth);
+	if (ret != 0) {
+		return ret;
+	}
+
+	switch (module->type) {
+	case s32cc_osc_t:
+		ret = get_osc_freq(module, drv, rate, ldepth);
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
 static int s32cc_clk_set_rate(unsigned long id, unsigned long rate,
 			      unsigned long *orate)
 {
@@ -1340,6 +1383,29 @@ static int s32cc_clk_set_rate(unsigned long id, unsigned long rate,
 	return ret;
 }
 
+static unsigned long s32cc_clk_get_rate(unsigned long id)
+{
+	const struct s32cc_clk_drv *drv = get_drv();
+	unsigned int depth = MAX_STACK_DEPTH;
+	const struct s32cc_clk *clk;
+	unsigned long rate = 0UL;
+	int ret;
+
+	clk = s32cc_get_arch_clk(id);
+	if (clk == NULL) {
+		return 0;
+	}
+
+	ret = get_module_rate(&clk->desc, drv, &rate, depth);
+	if (ret != 0) {
+		ERROR("Failed to get frequency (%lu MHz) for clock %lu\n",
+		      rate, id);
+		return 0;
+	}
+
+	return rate;
+}
+
 static struct s32cc_clk_obj *get_no_parent(const struct s32cc_clk_obj *module)
 {
 	return NULL;

drivers/nxp/clk/s32cc/s32cc_clk_modules.c

@@ -1,5 +1,5 @@
 /*
- * Copyright 2020-2024 NXP
+ * Copyright 2020-2025 NXP
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -20,7 +20,7 @@ static struct s32cc_clk fxosc_clk =
 	S32CC_MODULE_CLK(fxosc);
 
 static struct s32cc_osc firc =
-	S32CC_OSC_INIT(S32CC_FIRC);
+	S32CC_OSC_INIT_FREQ(S32CC_FIRC, 48 * MHZ);
 static struct s32cc_clk firc_clk =
 	S32CC_MODULE_CLK(firc);
 

include/drivers/nxp/clk/s32cc/s32cc-clk-modules.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
 /*
- * Copyright 2020-2024 NXP
+ * Copyright 2020-2025 NXP
  */
 #ifndef S32CC_CLK_MODULES_H
 #define S32CC_CLK_MODULES_H
@@ -52,14 +52,18 @@ struct s32cc_osc {
 	void *base;
 };
 
-#define S32CC_OSC_INIT(SOURCE)       \
+#define S32CC_OSC_INIT_FREQ(SOURCE, FREQ) \
 {                                         \
 	.desc = {                         \
 		.type = s32cc_osc_t,      \
 	},                                \
 	.source = (SOURCE),               \
+	.freq = (FREQ),                   \
 }
 
+#define S32CC_OSC_INIT(SOURCE) \
+	S32CC_OSC_INIT_FREQ(SOURCE, 0)
+
 struct s32cc_clkmux {
 	struct s32cc_clk_obj desc;
 	enum s32cc_clk_source module;