diff --git a/docs/plat/arm/fvp/fvp-support.rst b/docs/plat/arm/fvp/fvp-support.rst
index ad76cf169..0ce1905db 100644
--- a/docs/plat/arm/fvp/fvp-support.rst
+++ b/docs/plat/arm/fvp/fvp-support.rst
@@ -9,24 +9,22 @@ Arm FVPs without shifted affinities, and that do not support threaded CPU cores
 (64-bit host machine only).
 
 .. note::
-   The FVP models used are Version 11.26 Build 11, unless otherwise stated.
+   The FVP models used are version 11.28 Build 23.
 
 -  ``FVP_Base_AEMvA-AEMvA``
 -  ``FVP_Base_RevC-2xAEMvA``
--  ``FVP_Base_Cortex-A32x4``
--  ``FVP_Base_Cortex-A35x4``
--  ``FVP_Base_Cortex-A53x4``
+-  ``FVP_Base_Cortex-A32``
+-  ``FVP_Base_Cortex-A35``
+-  ``FVP_Base_Cortex-A53``
 -  ``FVP_Base_Cortex-A55``
 -  ``FVP_Base_Cortex-A57x1-A53x1``
 -  ``FVP_Base_Cortex-A57x2-A53x4``
--  ``FVP_Base_Cortex-A57x4``
+-  ``FVP_Base_Cortex-A57``
 -  ``FVP_Base_Cortex-A57x4-A53x4``
--  ``FVP_Base_Cortex-A65`` (Version 11.24/24)
--  ``FVP_Base_Cortex-A65AE`` (Version 11.24/24)
--  ``FVP_Base_Cortex-A710``
--  ``FVP_Base_Cortex-A72x4``
--  ``FVP_Base_Cortex-A72x4-A53x4``
--  ``FVP_Base_Cortex-A73x4``
+-  ``FVP_Base_Cortex-A65``
+-  ``FVP_Base_Cortex-A65AE``
+-  ``FVP_Base_Cortex-A72``
+-  ``FVP_Base_Cortex-A73``
 -  ``FVP_Base_Cortex-A73x4-A53x4``
 -  ``FVP_Base_Cortex-A75``
 -  ``FVP_Base_Cortex-A76``
@@ -35,17 +33,17 @@ Arm FVPs without shifted affinities, and that do not support threaded CPU cores
 -  ``FVP_Base_Cortex-A78``
 -  ``FVP_Base_Cortex-A78AE``
 -  ``FVP_Base_Cortex-A78C``
+-  ``FVP_Base_Cortex-A710``
 -  ``FVP_Base_Cortex-X2``
--  ``FVP_Base_Neoverse-E1`` (Version 11.24/24)
+-  ``FVP_Base_Cortex-X4``
+-  ``FVP_Base_Cortex-X925``
+-  ``FVP_Base_Neoverse-E1``
 -  ``FVP_Base_Neoverse-N1``
 -  ``FVP_Base_Neoverse-N2``
 -  ``FVP_Base_Neoverse-V1``
 -  ``FVP_BaseR_AEMv8R``
--  ``FVP_Morello`` (Version 0.11/33)
--  ``FVP_RD_V1``
--  ``FVP_RD_1_AE`` (Version 11.27/20)
--  ``FVP_TC3`` (Version 11.26/16)
--  ``FVP_TC4`` (Version 0.0/8404)
+-  ``FVP_RD_1_AE``
+-  ``FVP_TC4``
 
 The latest version of the AArch32 build of TF-A has been tested on the
 following Arm FVPs without shifted affinities, and that do not support threaded
@@ -53,7 +51,7 @@ CPU cores (64-bit host machine only).
 
 -  ``FVP_Base_AEMvA``
 -  ``FVP_Base_AEMvA-AEMvA``
--  ``FVP_Base_Cortex-A32x4``
+-  ``FVP_Base_Cortex-A32``
 
 .. note::
    The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities, which
@@ -94,7 +92,7 @@ All the above platforms have been tested with `Linaro Release 20.01`_.
 
 --------------
 
-*Copyright (c) 2019-2024, Arm Limited. All rights reserved.*
+*Copyright (c) 2019-2025, Arm Limited. All rights reserved.*
 
 .. _Arm's website: `FVP models`_
 .. _FVP models: https://developer.arm.com/products/system-design/fixed-virtual-platforms