From ba1faaf117158dc1f1272192f3d8131421e96458 Mon Sep 17 00:00:00 2001
From: Jagdish Gediya <jagdish.gediya@arm.com>
Date: Fri, 28 Jun 2024 16:55:09 +0000
Subject: [PATCH] fix(tc): modify mmc configuration for TC4 FPGA

Modify mmc base addr and irq numbers for TC4 FPGA in dts to match
with its RoS configuration.

Change-Id: Ie8fe1f1d3aef1c020ac85db7c3b81dfad3722e2f
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
---
 fdts/tc4.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/fdts/tc4.dts b/fdts/tc4.dts
index 5ab58d571..0782093da 100644
--- a/fdts/tc4.dts
+++ b/fdts/tc4.dts
@@ -25,9 +25,15 @@
 
 #define SYS_REGS_ADDR			60080000
 
+#if TARGET_FLAVOUR_FVP
 #define MMC_ADDR			600b0000
 #define MMC_INT_0			778
 #define MMC_INT_1			779
+#else /* TARGET_FLAVOUR_FPGA */
+#define MMC_ADDR			1c050000
+#define MMC_INT_0			107
+#define MMC_INT_1			108
+#endif /* TARGET_FLAVOUR_FVP */
 
 #define RTC_ADDR			600a0000
 #define RTC_INT				777