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refactor(fvp): add support for cluster power-on
All new FVP's have incorporated the following PYSR bits bit 31 is cluster ON status bit 30 is core ON status bit 29 is thread ON status So add support to check cluster power ON which is supported from affinity-level-2 But older cores with no DSU still uses affinity-level-1 for cluster power-on status. Ref: https://developer.arm.com/documentation/100964/1125/Base-Platform/Base---components Change-Id: Id86811b14685d9ca900021301e5e8b7d52189963 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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1 changed files with 10 additions and 5 deletions
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@ -323,13 +323,13 @@ static int fvp_node_hw_state(u_register_t target_cpu,
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unsigned int power_level)
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{
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unsigned int psysr;
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int ret;
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int ret = 0;
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/*
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* The format of 'power_level' is implementation-defined, but 0 must
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* mean a CPU. We also allow 1 to denote the cluster
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*/
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if ((power_level != ARM_PWR_LVL0) && (power_level != ARM_PWR_LVL1))
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if ((power_level < ARM_PWR_LVL0) || (power_level > ARM_PWR_LVL1))
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return PSCI_E_INVALID_PARAMS;
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/*
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@ -343,9 +343,14 @@ static int fvp_node_hw_state(u_register_t target_cpu,
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if (power_level == ARM_PWR_LVL0) {
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ret = ((psysr & PSYSR_AFF_L0) != 0U) ? HW_ON : HW_OFF;
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} else {
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/* power_level == ARM_PWR_LVL1 */
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ret = ((psysr & PSYSR_AFF_L1) != 0U) ? HW_ON : HW_OFF;
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} else if (power_level == ARM_PWR_LVL1) {
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/*
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* Use L1 affinity if MPIDR_EL1.MT bit is not set else use L2 affinity.
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*/
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if ((read_mpidr_el1() & MPIDR_MT_MASK) == 0U)
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ret = ((psysr & PSYSR_AFF_L1) != 0U) ? HW_ON : HW_OFF;
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else
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ret = ((psysr & PSYSR_AFF_L2) != 0U) ? HW_ON : HW_OFF;
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}
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return ret;
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