From 90f5283ec052f622285ef35210d4bc452e4b905a Mon Sep 17 00:00:00 2001 From: Sieu Mun Tang Date: Sun, 9 Jun 2024 23:47:53 +0800 Subject: [PATCH] fix(intel): fix bridge enable and disable function 1. hps reset and reboot spec is missing ack clear status step 2. software workaround for bridge timeout 3. f2sdram bridge quick write thru failed 4. bridge timeout workaround for F2SOC and F2SDRAM Change-Id: Ide4210ff862531f82e083633af385b559ffbe16b Signed-off-by: Jit Loon Lim Signed-off-by: Sieu Mun Tang --- plat/intel/soc/common/soc/socfpga_reset_manager.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/intel/soc/common/soc/socfpga_reset_manager.c b/plat/intel/soc/common/soc/socfpga_reset_manager.c index cb4a21030..ef83ef098 100644 --- a/plat/intel/soc/common/soc/socfpga_reset_manager.c +++ b/plat/intel/soc/common/soc/socfpga_reset_manager.c @@ -1266,4 +1266,4 @@ int socfpga_cpurstrelease(unsigned int cpu_id) } while (timeout-- > 0); return RSTMGR_RET_ERROR; -} +} \ No newline at end of file