From b54771678d0db79c709a7b379b107ea4546b33fe Mon Sep 17 00:00:00 2001 From: Boyan Karatotev <boyan.karatotev@arm.com> Date: Tue, 21 Jan 2025 08:16:34 +0000 Subject: [PATCH] refactor(cpus): convert checker functions to standard helpers The library check_erratum_ls already incorporates the check. The return of ERRATA_MISSING is handled in the errata_report.c functions. Change-Id: Ic1dff2bc5235195f7cfce1709cd42467f88b3e4c Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> --- lib/cpus/aarch64/cortex_a520.S | 17 ++--------------- lib/cpus/aarch64/cortex_x4.S | 15 +-------------- 2 files changed, 3 insertions(+), 29 deletions(-) diff --git a/lib/cpus/aarch64/cortex_a520.S b/lib/cpus/aarch64/cortex_a520.S index 811c836ab..d9e654b0f 100644 --- a/lib/cpus/aarch64/cortex_a520.S +++ b/lib/cpus/aarch64/cortex_a520.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2024, Arm Limited. All rights reserved. + * Copyright (c) 2021-2025, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -39,20 +39,7 @@ check_erratum_ls cortex_a520, ERRATUM(2858100), CPU_REV(0, 1) workaround_runtime_start cortex_a520, ERRATUM(2938996), ERRATA_A520_2938996, CORTEX_A520_MIDR workaround_runtime_end cortex_a520, ERRATUM(2938996) -check_erratum_custom_start cortex_a520, ERRATUM(2938996) - - /* This erratum needs to be enabled for r0p0 and r0p1. - * Check if revision is less than or equal to r0p1. - */ - -#if ERRATA_A520_2938996 - mov x1, #1 - b cpu_rev_var_ls -#else - mov x0, #ERRATA_MISSING -#endif - ret -check_erratum_custom_end cortex_a520, ERRATUM(2938996) +check_erratum_ls cortex_a520, ERRATUM(2938996), CPU_REV(0, 1) /* ---------------------------------------------------- * HW will do the cache maintenance while powering down diff --git a/lib/cpus/aarch64/cortex_x4.S b/lib/cpus/aarch64/cortex_x4.S index 1e81892b1..4b1cf9175 100644 --- a/lib/cpus/aarch64/cortex_x4.S +++ b/lib/cpus/aarch64/cortex_x4.S @@ -32,20 +32,7 @@ workaround_runtime_start cortex_x4, ERRATUM(2726228), ERRATA_X4_2726228, CORTEX_X4_MIDR workaround_runtime_end cortex_x4, ERRATUM(2726228) -check_erratum_custom_start cortex_x4, ERRATUM(2726228) - - /* This erratum needs to be enabled for r0p0 and r0p1. - * Check if revision is less than or equal to r0p1. - */ - -#if ERRATA_X4_2726228 - mov x1, #1 - b cpu_rev_var_ls -#else - mov x0, #ERRATA_MISSING -#endif - ret -check_erratum_custom_end cortex_x4, ERRATUM(2726228) +check_erratum_ls cortex_x4, ERRATUM(2726228), CPU_REV(0, 1) /* Disable hardware page aggregation. Enables mitigation for `CVE-2024-5660` */ workaround_reset_start cortex_x4, CVE(2024, 5660), WORKAROUND_CVE_2024_5660