mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
Merge "refactor(cpufeat): feat detect helpers inlining" into integration
This commit is contained in:
Manish Pandey
TrustedFirmware Code Review
commit
b4f72cfa08
2 changed files with 46 additions and 0 deletions
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@ -16,6 +16,7 @@
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((unsigned int)(((reg) >> (feat)) & mask))
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#define CREATE_FEATURE_SUPPORTED(name, read_func, guard) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _supported(void) \
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{ \
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if ((guard) == FEAT_STATE_DISABLED) { \
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@ -28,6 +29,7 @@ static inline bool is_ ## name ## _supported(void) \
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}
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#define CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _present(void) \
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{ \
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return (ISOLATE_FIELD(read_ ## idreg(), idfield, mask) >= idval) \
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@ -68,6 +70,7 @@ CREATE_FEATURE_SUPPORTED(name, is_ ## name ## _present, guard)
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*/
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/* GENTIMER */
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__attribute__((always_inline))
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static inline bool is_armv7_gentimer_present(void)
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{
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return ISOLATE_FIELD(read_id_pfr1(), ID_PFR1_GENTIMER_SHIFT,
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@ -111,6 +114,7 @@ CREATE_FEATURE_PRESENT(feat_pmuv3, id_dfr0, ID_DFR0_PERFMON_SHIFT,
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ID_DFR0_PERFMON_MASK, 3U)
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/* FEAT_MTPMU */
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__attribute__((always_inline))
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static inline bool is_feat_mtpmu_present(void)
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{
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unsigned int mtpmu = ISOLATE_FIELD(read_id_dfr1(), ID_DFR1_MTPMU_SHIFT,
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@ -124,39 +128,71 @@ CREATE_FEATURE_SUPPORTED(feat_mtpmu, is_feat_mtpmu_present, DISABLE_MTPMU)
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* code. In fact, EL2 context switching is only needed for AArch64 (since
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* there is no secure AArch32 EL2), so just disable these features here.
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*/
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__attribute__((always_inline))
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static inline bool is_feat_twed_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ecv_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ecv_v2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_csv2_2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_csv2_3_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ras_supported(void) { return false; }
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/* The following features are supported in AArch64 only. */
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__attribute__((always_inline))
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static inline bool is_feat_vhe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sel2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_fgt_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_tcr2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_spe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_rng_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_gcs_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_mte2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_mpam_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_hcx_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sve_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_brbe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_trbe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_nv2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sme_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sme2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s2poe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s1poe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sxpoe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s2pie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s1pie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sxpie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_uao_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_nmi_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ebep_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sebep_present(void) { return false; }
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#endif /* ARCH_FEATURES_H */
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@ -16,6 +16,7 @@
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((unsigned int)(((reg) >> (feat)) & mask))
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#define CREATE_FEATURE_SUPPORTED(name, read_func, guard) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _supported(void) \
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{ \
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if ((guard) == FEAT_STATE_DISABLED) { \
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@ -28,6 +29,7 @@ static inline bool is_ ## name ## _supported(void) \
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}
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#define CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _present(void) \
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{ \
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return (ISOLATE_FIELD(read_ ## idreg(), idfield, mask) >= idval) \
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@ -134,6 +136,7 @@ CREATE_FEATURE_SUPPORTED(name, is_ ## name ## _present, guard)
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* +----------------------------+
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*/
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__attribute__((always_inline))
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static inline bool is_armv7_gentimer_present(void)
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{
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/* The Generic Timer is always present in an ARMv8-A implementation */
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@ -162,6 +165,7 @@ CREATE_FEATURE_PRESENT(feat_pacqarma3, id_aa64isar2_el1, 0,
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(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT)), 1U)
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/* PAUTH */
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__attribute__((always_inline))
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static inline bool is_armv8_3_pauth_present(void)
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{
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uint64_t mask_id_aa64isar1 =
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@ -244,6 +248,7 @@ CREATE_FEATURE_FUNCS(feat_s2poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2POE_SHIFT,
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CREATE_FEATURE_FUNCS(feat_s1poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1POE_SHIFT,
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ID_AA64MMFR3_EL1_S1POE_MASK, 1U, ENABLE_FEAT_S1POE)
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__attribute__((always_inline))
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static inline bool is_feat_sxpoe_supported(void)
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{
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return is_feat_s1poe_supported() || is_feat_s2poe_supported();
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@ -257,6 +262,7 @@ CREATE_FEATURE_FUNCS(feat_s2pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2PIE_SHIFT,
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CREATE_FEATURE_FUNCS(feat_s1pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1PIE_SHIFT,
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ID_AA64MMFR3_EL1_S1PIE_MASK, 1U, ENABLE_FEAT_S1PIE)
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__attribute__((always_inline))
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static inline bool is_feat_sxpie_supported(void)
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{
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return is_feat_s1pie_supported() || is_feat_s2pie_supported();
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@ -283,6 +289,7 @@ CREATE_FEATURE_FUNCS(feat_amuv1p1, id_aa64pfr0_el1, ID_AA64PFR0_AMU_SHIFT,
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* 0x11: v1.1 Armv8.4 or later
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*
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*/
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__attribute__((always_inline))
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static inline bool is_feat_mpam_present(void)
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{
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unsigned int ret = (unsigned int)((((read_id_aa64pfr0_el1() >>
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@ -398,6 +405,7 @@ CREATE_FEATURE_FUNCS(feat_sme2, id_aa64pfr1_el1, ID_AA64PFR1_EL1_SME_SHIFT,
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* Function to get hardware granularity support
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******************************************************************************/
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__attribute__((always_inline))
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static inline bool is_feat_tgran4K_present(void)
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{
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unsigned int tgranx = ISOLATE_FIELD(read_id_aa64mmfr0_el1(),
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@ -408,6 +416,7 @@ static inline bool is_feat_tgran4K_present(void)
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CREATE_FEATURE_PRESENT(feat_tgran16K, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_TGRAN16_SHIFT,
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ID_AA64MMFR0_EL1_TGRAN16_MASK, TGRAN16_IMPLEMENTED)
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__attribute__((always_inline))
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static inline bool is_feat_tgran64K_present(void)
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{
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unsigned int tgranx = ISOLATE_FIELD(read_id_aa64mmfr0_el1(),
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@ -420,6 +429,7 @@ CREATE_FEATURE_PRESENT(feat_pmuv3, id_aa64dfr0_el1, ID_AA64DFR0_PMUVER_SHIFT,
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ID_AA64DFR0_PMUVER_MASK, 1U)
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/* FEAT_MTPMU */
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__attribute__((always_inline))
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static inline bool is_feat_mtpmu_present(void)
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{
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unsigned int mtpmu = ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT,
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