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rcar_gen3: drivers: spi multio bus controller
Signed-off-by: ldts <jramirez@baylibre.com>
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2 changed files with 59 additions and 0 deletions
34
drivers/renesas/rcar/rpc/rpc_driver.c
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34
drivers/renesas/rcar/rpc/rpc_driver.c
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/*
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* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <mmio.h>
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#include <stdint.h>
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#include <string.h>
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#include "cpg_registers.h"
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#include "rpc_registers.h"
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#include "debug.h"
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#include "rcar_private.h"
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#define MSTPSR9_RPC_BIT (0x00020000U)
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#define RPC_CMNCR_MD_BIT (0x80000000U)
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static void rpc_enable(void)
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{
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/* Enable clock supply to RPC. */
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mstpcr_write(CPG_SMSTPCR9, CPG_MSTPSR9, MSTPSR9_RPC_BIT);
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}
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static void rpc_setup(void)
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{
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if (mmio_read_32(RPC_CMNCR) & RPC_CMNCR_MD_BIT)
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mmio_clrbits_32(RPC_CMNCR, RPC_CMNCR_MD_BIT);
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}
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void rcar_rpc_init(void)
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{
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rpc_enable();
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rpc_setup();
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}
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25
drivers/renesas/rcar/rpc/rpc_registers.h
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25
drivers/renesas/rcar/rpc/rpc_registers.h
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/*
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* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef RPC_REGISTER_H__
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#define RPC_REGISTER_H__
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#define RPC_BASE (0xEE200000U)
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#define RPC_CMNCR (RPC_BASE + 0x0000U)
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#define RPC_SSLDR (RPC_BASE + 0x0004U)
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#define RPC_DRCR (RPC_BASE + 0x000CU)
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#define RPC_DRCMR (RPC_BASE + 0x0010U)
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#define RPC_DRENR (RPC_BASE + 0x001CU)
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#define RPC_SMCR (RPC_BASE + 0x0020U)
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#define RPC_SMCMR (RPC_BASE + 0x0024U)
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#define RPC_SMENR (RPC_BASE + 0x0030U)
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#define RPC_CMNSR (RPC_BASE + 0x0048U)
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#define RPC_DRDMCR (RPC_BASE + 0x0058U)
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#define RPC_DRDRENR (RPC_BASE + 0x005CU)
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#define RPC_PHYCNT (RPC_BASE + 0x007CU)
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#define RPC_PHYINT (RPC_BASE + 0x0088U)
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#endif
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