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fix(plat/st): add UART reset in crash console init
Add the reset set/clear sequence at the beginning of the function plat_crash_console_init(). If not done, there is a risk that the UART is in a bad state and will not be able to print correct characters. Change-Id: Id31e28773d6c4f26f16d3569d1e3c5aa0e26e039 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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288f5cf204
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2 changed files with 16 additions and 1 deletions
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@ -205,6 +205,8 @@ enum ddr_type {
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#define DEBUG_UART_TX_CLKSRC RCC_UART24CKSELR_HSI
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#define DEBUG_UART_TX_CLKSRC RCC_UART24CKSELR_HSI
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#define DEBUG_UART_TX_EN_REG RCC_MP_APB1ENSETR
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#define DEBUG_UART_TX_EN_REG RCC_MP_APB1ENSETR
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#define DEBUG_UART_TX_EN RCC_MP_APB1ENSETR_UART4EN
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#define DEBUG_UART_TX_EN RCC_MP_APB1ENSETR_UART4EN
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#define DEBUG_UART_RST_REG RCC_APB1RSTSETR
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#define DEBUG_UART_RST_BIT RCC_APB1RSTSETR_UART4RST
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/*******************************************************************************
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/*******************************************************************************
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* STM32MP1 ETZPC
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* STM32MP1 ETZPC
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -148,6 +148,19 @@ endfunc plat_my_core_pos
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* ---------------------------------------------
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* ---------------------------------------------
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*/
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*/
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func plat_crash_console_init
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func plat_crash_console_init
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/* Reset UART peripheral */
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ldr r1, =(RCC_BASE + DEBUG_UART_RST_REG)
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ldr r2, =DEBUG_UART_RST_BIT
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str r2, [r1]
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1:
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ldr r0, [r1]
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ands r2, r0, r2
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beq 1b
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str r2, [r1, #4] /* RSTCLR register */
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2:
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ldr r0, [r1]
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ands r2, r0, r2
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bne 2b
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/* Enable GPIOs for UART TX */
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/* Enable GPIOs for UART TX */
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ldr r1, =(RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG)
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ldr r1, =(RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG)
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ldr r2, [r1]
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ldr r2, [r1]
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