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errata: workaround for Cortex-A78 erratum 2132060

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Cortex-A78 erratum 2132060 is a Cat B erratum that applies to
revisions r0p0, r1p0, r1p1, and r1p2 of CPU. It is still open.
The workaround is to write the value 2'b11 to the PF_MODE bits
in the CPUECTLR_EL1 register which will place the data prefetcher
in the most conservative mode instead of disabling it.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401784/latest

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: If7dec72578633d37d110d103099e406c3a970ff7
This commit is contained in:
nayanpatel-arm 2021-09-28 17:31:50 -07:00 • committed by nayankumar.patel
parent 8e140272fb
commit b36fe21243
4 changed files with 50 additions and 0 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -284,6 +284,10 @@ For Cortex-A78, the following errata build flags are defined :
- ``ERRATA_A78_1952683``: This applies errata 1952683 workaround to Cortex-A78
CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
- ``ERRATA_A78_2132060``: This applies errata 2132060 workaround to Cortex-A78
CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2. It
is still open.
For Cortex-A78 AE, the following errata build flags are defined :
- ``ERRATA_A78_AE_1941500`` : This applies errata 1941500 workaround to Cortex-A78

3
include/lib/cpus/aarch64/cortex_a78.h
View file

@ -16,6 +16,9 @@
******************************************************************************/
#define CORTEX_A78_CPUECTLR_EL1 S3_0_C15_C1_4
#define CORTEX_A78_CPUECTLR_EL1_BIT_8 (ULL(1) << 8)
#define CORTEX_A78_CPUECTLR_EL1_PF_MODE_CNSRV ULL(3)
#define CPUECTLR_EL1_PF_MODE_LSB U(6)
#define CPUECTLR_EL1_PF_MODE_WIDTH U(2)
/*******************************************************************************
* CPU Power Control register specific definitions

35
lib/cpus/aarch64/cortex_a78.S
View file

@ -198,6 +198,35 @@ func check_errata_1952683
b cpu_rev_var_ls
endfunc check_errata_1952683
/* --------------------------------------------------
* Errata Workaround for Cortex A78 Errata 2132060.
* This applies to revisions r0p0, r1p0, r1p1, and r1p2.
* It is still open.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x1, x17
* --------------------------------------------------
*/
func errata_a78_2132060_wa
/* Check revision. */
mov x17, x30
bl check_errata_2132060
cbz x0, 1f
/* Apply the workaround. */
mrs x1, CORTEX_A78_CPUECTLR_EL1
mov x0, #CORTEX_A78_CPUECTLR_EL1_PF_MODE_CNSRV
bfi x1, x0, #CPUECTLR_EL1_PF_MODE_LSB, #CPUECTLR_EL1_PF_MODE_WIDTH
msr CORTEX_A78_CPUECTLR_EL1, x1
1:
ret x17
endfunc errata_a78_2132060_wa
func check_errata_2132060
/* Applies to r0p0, r0p1, r1p1, and r1p2 */
mov x1, #0x12
b cpu_rev_var_ls
endfunc check_errata_2132060
/* -------------------------------------------------
* The CPU Ops reset function for Cortex-A78
* -------------------------------------------------
@ -232,6 +261,11 @@ func cortex_a78_reset_func
bl errata_a78_1952683_wa
#endif
#if ERRATA_A78_2132060
mov x0, x18
bl errata_a78_2132060_wa
#endif
#if ENABLE_AMU
/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
mrs x0, actlr_el3
@ -291,6 +325,7 @@ func cortex_a78_errata_report
report_errata ERRATA_A78_1951500, cortex_a78, 1951500
report_errata ERRATA_A78_1821534, cortex_a78, 1821534
report_errata ERRATA_A78_1952683, cortex_a78, 1952683
report_errata ERRATA_A78_2132060, cortex_a78, 2132060
ldp x8, x30, [sp], #16
ret

8
lib/cpus/cpu-ops.mk
View file

@ -327,6 +327,10 @@ ERRATA_A78_1821534 ?=0
# to revision r0p0 of the A78 cpu and was fixed in the revision r1p0.
ERRATA_A78_1952683 ?=0
# Flag to apply erratum 2132060 workaround during reset. This erratum applies
# to revisions r0p0, r1p0, r1p1, and r1p2 of the A78 cpu. It is still open.
ERRATA_A78_2132060 ?=0
# Flag to apply T32 CLREX workaround during reset. This erratum applies
# only to r0p0 and r1p0 of the Neoverse N1 cpu.
ERRATA_N1_1043202 ?=0
@ -718,6 +722,10 @@ $(eval $(call add_define,ERRATA_A78_1821534))
$(eval $(call assert_boolean,ERRATA_A78_1952683))
$(eval $(call add_define,ERRATA_A78_1952683))
# Process ERRATA_A78_2132060 flag
$(eval $(call assert_boolean,ERRATA_A78_2132060))
$(eval $(call add_define,ERRATA_A78_2132060))
# Process ERRATA_N1_1043202 flag
$(eval $(call assert_boolean,ERRATA_N1_1043202))
$(eval $(call add_define,ERRATA_N1_1043202))